Voltage regulator

US10061334B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10061334-B2
Application numberUS-201715791693-A
CountryUS
Kind codeB2
Filing dateOct 24, 2017
Priority dateNov 2, 2016
Publication dateAug 28, 2018
Grant dateAug 28, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A voltage regulator includes an output transistor controlled by an error amplifier, first and second resistors connected in series between an output terminal and a ground terminal via a first node, third and fourth resistors connected in series between a load voltage monitoring terminal and the ground terminal via a second node, and a fifth resistor and a switching transistor connected in series between the first node and the ground terminal. When a voltage which is supplied to a load connected to the output terminal drops due to a parasitic resistance, a voltage at the second node falls below that of the first node. The switching transistor, then, turns on to connect the fifth resistor in parallel to the second resistor to lower the voltage at the first node. Feedback of this voltage to the error amplifier raises the voltage at the output terminal to a desired value.

First claim

Opening claim text (preview).

What is claimed is: 1. A voltage regulator, comprising: an output transistor having a source connected to a first power supply terminal; an output terminal from which a voltage at a drain of the output transistor is output, and connected to a power supply input terminal of an external load; a first voltage divider circuit having a first resistor and a second resistor connected in series between the drain of the output transistor and a second power supply terminal via a first node; a load voltage monitoring terminal to which a voltage at the power supply input terminal of the external load is input; a second voltage divider circuit having a third resistor and a fourth resistor connected in series between the load voltage monitoring terminal and the second power supply terminal via a second node; a fifth resistor and a first switching transistor connected in series between the first node and the second power supply terminal; and a first comparator connected between the first power supply terminal and the second power supply terminal, and is configured to: compare a voltage at the first node and a voltage at the second node to each other; and output a signal for turning on the first switching transistor when the voltage at the second node falls below the voltage at the first node by a first predetermined voltage amount or more, a ratio between a resistance value of the first resistor and a resistance value of the second resistor being the same as a ratio between a resistance value of the third resistor and a resistance value of the fourth resistor, and a voltage at a gate of the output transistor being reduced so that a voltage at the output terminal is raised when the voltage at the first node falls below a reference voltage. 2. A voltage regulator according to claim 1 , further comprising a switching circuit connected between a gate of the first switching transistor and the second power supply terminal, wherein the switching circuit is configured to turn on when at least one of an overheat protection function or an overcurrent protection function operates. 3. A voltage regulator according to claim 1 , further comprising a filter circuit connected between the load voltage monitoring terminal and the third resistor. 4. A voltage regulator according to claim 2 , further comprising a filter circuit connected between the load voltage monitoring terminal and the third resistor. 5. A voltage regulator according to claim 1 , further comprising: a second comparator connected between the first power supply terminal and the second power supply terminal; and a sixth resistor and a second switching transistor connected in series between the first node and the second power supply terminal, wherein the fourth resistor comprises a first division resistor and a second division resistor connected in series between the second node and the second power supply terminal via a third node, and form a combined resistor having a resistance value that is equal to a resistance value of the fourth resistor, and wherein the second comparator is configured to: compare the voltage at the first node and a voltage at the third node to each other; and output a signal for turning on the second switching transistor when the voltage at the third node falls below the voltage at the first node by a second predetermined voltage amount or more. 6. A voltage regulator according to claim 2 , further comprising: a second comparator connected between the first power supply terminal and the second power supply terminal; and a sixth resistor and a second switching transistor connected in series between the first node and the second power supply terminal, wherein the fourth resistor comprises a first division resistor and a second division resistor connected in series between the second node and the second power supply terminal via a third node, and form a combined resistor having a resistance value that is equal to a resistance value of the fourth resistor, and wherein the second comparator is configured to: compare the voltage at the first node and a voltage at the third node to each other; and output a signal for turning on the second switching transistor when the voltage at the third node falls below the voltage at the first node by a second predetermined voltage amount or more. 7. A voltage regulator according to claim 3 , further comprising: a second comparator connected between the first power supply terminal and the second power supply terminal; and a sixth resistor and a second switching transistor connected in series between the first node and the second power supply terminal, wherein the fourth resistor comprises a first division resistor and a second division resistor connected in series between the second node and the second power supply terminal via a third node, and form a combined resistor having a resistance value that is equal to a resistance value of the fourth resistor, and wherein the second comparator is configured to: compare the voltage at the first node and a voltage at the third node to each other; and output a signal for turning on the second switching transistor when the voltage at the third node falls below the voltage at the first node by a second predetermined voltage amount or more. 8. A voltage regulator according to claim 4 , further comprising: a second comparator connected between the first power supply terminal and the second power supply terminal; and a sixth resistor and a second switching transistor connected in series between the first node and the second power supply terminal, wherein the fourth resistor comprises a first division resistor and a second division resistor connected in series between the second node and the second power supply terminal via a third node, and form a combined resistor having a resistance value that is equal to a resistance value of the fourth resistor, and wherein the second comparator is configured to: compare the voltage at the first node and a voltage at the third node to each other; and output a signal for turning on the second switching transistor when the voltage at the third node falls below the voltage at the first node by a second predetermined voltage amount or more. 9. A voltage regulator according to claim 1 , further comprising a PMOS transistor connected between the first power supply terminal and an operating current input terminal of the first comparator, and having a gate connected to the gate of the output transistor. 10. A voltage regulator according to claim 2 , further comprising a PMOS transistor connected between the first power supply terminal and an operating current input terminal of the first comparator, and having a gate connected to the gate of the output transistor. 11. A voltage regulator according to claim 3 , further comprising a PMOS transistor connected between the first power supply terminal and an operating current input terminal of the first comparator, and having a gate connected to the gate of the output transistor. 12. A voltage regulator according to claim 4 , further comprising a PMOS transistor connected between the first power supply terminal and an operating current input terminal of the first comparator, and having a gate connected to the gate of the output transistor. 13. A voltage regulator according to claim 1 , wherein the first voltage divider circuit and the second voltage divider circuit have the same structure. 14. A voltage regulator according to claim 2 , wherein the first voltage divider circuit and the second voltage divider circuit have the same structure. 15. A voltage regulator accordi

Assignees

Inventors

Classifications

  • G05F1/565Primary

    sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title

  • Modifications for protecting switching circuit against overcurrent or overvoltage · CPC title

  • G05F1/575Primary

    characterised by the feedback circuit · CPC title

  • G05F1/59Primary

    including plural semiconductor devices as final control devices for a single load · CPC title

  • with overvoltage detector · CPC title

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Frequently asked questions

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What does patent US10061334B2 cover?
A voltage regulator includes an output transistor controlled by an error amplifier, first and second resistors connected in series between an output terminal and a ground terminal via a first node, third and fourth resistors connected in series between a load voltage monitoring terminal and the ground terminal via a second node, and a fifth resistor and a switching transistor connected in serie…
Who is the assignee on this patent?
Sii Semiconductor Corp, Ablic Inc
What technology area does this patent fall under?
Primary CPC classification G05F1/565. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 28 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).