Test board unit and apparatus for testing a semiconductor chip including the same

Patent metadata

Field	Value
Publication number	US-10060969-B2
Application number	US-201514846053-A
Country	US
Kind code	B2
Filing date	Sep 4, 2015
Priority date	Mar 4, 2015
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

A test board unit may include a test board, a thermal tank and a heat-dissipating plate. The test board may be configured to provide a semiconductor chip with a test current. The thermal tank may be configured to dissipate heat generated in the semiconductor chip. The heat-dissipating plate may be coupled between the test board and the thermal tank and may be configured to transfer the heat from the semiconductor chip to the thermal tank.

First claim

What is claimed is:

1. A test board unit comprising:
a test board configured to provide a semiconductor chip with a test current;
a thermal tank configured to dissipate heat generated from the semiconductor chip and to include at least one heat-dissipating hole; and
a heat-dissipating plate interposed between the test board and the thermal tank and configured to transfer the heat to the thermal tank,
wherein the heat-dissipating plate includes a first surface facing the test board and a second surface facing the thermal tank, and
a whole of the first surface of the heat-dissipating plate is contacted with the test board and the second surface of the heat-dissipating plate includes a first portion contacted with the thermal tank and a second portion isolated from the thermal tank by the heat-dissipating hole.

2. The test board unit of claim 1 , further comprising an insulating layer formed on an outer surface of the thermal tank.

3. The test board unit of claim 1 , further comprising a heat-dissipating via arranged in the test board to electrically connect the semiconductor chip with the heat-dissipating plate.

4. The test board unit of claim 3 , wherein the heat-dissipating via includes a thermal via having a copper layer formed on an inner surface of the thermal via.

5. The test board unit of claim 1 , wherein the test board comprises a test pattern configured to provide the semiconductor chip with the test current, and the heat-dissipating plate is electrically connected to the test pattern.

6. A test board unit comprising:
a test board configured to provide a semiconductor chip with a test current;
a heat-dissipating plate including a first surface attached to the test board and a second surface;
a thermal tank configured to dissipate heat generated from the semiconductor chip and to partially contact with the second surface of the heat-dissipating plate, which is opposite to the first surface and to include at least one heat-dissipating hole; and
a heat-dissipating via formed in the test board to electrically couple the semiconductor chip with the thermal tank,
wherein the thermal tank is partially contacted with the second surface of the heat-dissipating plate.

7. The test board unit of claim 6 , wherein the thermal tank is electrically coupled to the semiconductor chip of the test board through the heat-dissipating plate and the heat-dissipating via.

8. The test board unit of claim 7 , wherein substantially no gap exists between the heat-dissipating plate-and the test board.

9. The test board unit of claim 6 , further comprising an insulating layer formed on an outer surface of the thermal tank.

10. The test board unit of claim 6 , wherein the test board comprises a test pattern configured to provide the semiconductor chip with the test current, and the heat-dissipating plate is electrically connected to the test pattern.

11. An apparatus for testing a semiconductor chip, the apparatus comprising:
a test board configured to provide the semiconductor chip with a test current;
a socket arranged on the test board and configured to accept the semiconductor chip;
a thermal tank configured to dissipate heat generated from the semiconductor chip and to include at least one heat-dissipatinq hole; and
a heat-dissipating plate coupled between the test board and the thermal tank and configured to transfer the heat to the thermal tank,
wherein the heat-dissipating plate includes a first surface facing the test board and a second surface facing the thermal tank, and
a whole of the first surface of the heat-dissipating plate is contacted with the test board and the second surface includes a first portion contacted with the thermal tank and a second portion isolated from the thermal portion by the heat-dissipating hole.

12. The apparatus of claim 11 , wherein the socket is arranged on a first surface of the test board, and the heat-dissipating plate is arranged on a second surface of the test board opposite to the first surface of the test board.

13. The apparatus of claim 11 , wherein the socket comprises electrode terminals electrically connected to the semiconductor chip, and the heat-dissipating plate is configured to surround the electrode terminals of the socket.

14. The apparatus of claim 11 , further comprising a heat-dissipating via arranged in the test board to electrically connect the semiconductor chip with the heat-dissipating plate,
wherein the socket is arranged to overlap with the heat-dissipating via.

Assignees

• Sk Hynix Inc
• Unitest Inc

Inventors

• Jung Woo Sik
• Koh Byoung Seon
• Oh Hyo Jin
• Choi Young Bae
• Jung Jin Young

Classifications

• H10P74/207 Primary

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title

• G01R31/2863 Primary

  Contacting devices, e.g. sockets, burn-in boards or mounting fixtures (in general G01R1/04) · CPC title

• G01R1/0408

  Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets (G01R1/067 takes precedence; mass production testing systems G01R31/59; testing of connections G01R31/66; for testing printed circuit boards G01R31/2808) · CPC title