RF receiver with built-in self-test function

Patent metadata

Field	Value
Publication number	US-10057795-B2
Application number	US-201715610840-A
Country	US
Kind code	B2
Filing date	Jun 1, 2017
Priority date	Jun 3, 2016
Publication date	Aug 21, 2018
Grant date	Aug 21, 2018

Abstract

A radio frequency (RF) receive circuit is described herein. In accordance with one embodiment, the RF receive circuit includes a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The signal processing chain includes at least two circuit nodes. The RF receive circuit further includes an oscillator circuit that is configured to generate a test signal. The oscillator circuit is coupled to the signal processing chain and is configured to selectively feed the oscillator signal into one of the at least two circuit nodes.

First claim

What is claimed is:

1. A radio frequency (RF) receive circuit that comprises:
a mixer configured to receive an RF input signal and to down-convert the RF input signal into a base-band or an intermediate frequency (IF) band;
an analog-to-digital converter (ADC);
a signal processing chain coupled between the mixer and the ADC, the signal processing chain including at least two circuit nodes; and
an oscillator circuit configured to generate a test signal,
wherein the oscillator circuit is selectively coupled to the at least two circuit nodes of the signal processing chain and configured to selectively feed the test signal into one of the at least two circuit nodes.

2. The RF receive circuit of claim 1 , wherein:
the signal processing chain includes a first circuit component and at least a second circuit component,
the at least two circuit nodes of the signal processing chain include one intermediate circuit node connecting the first circuit component and the second circuit component, and
the oscillator circuit is configured to selectively feed, dependent on a first selection signal the test signal into a selected one of the at least two circuit nodes.

3. The RF receive circuit of claim 2 , wherein:
the oscillator circuit includes a first oscillator and a second oscillator, which are coupled to two different circuit nodes of the at least two circuit nodes and which are configured to be selectively disabled and enabled in accordance with the first selection signal.

4. The RF receive circuit of claim 2 , wherein:
the oscillator circuit includes an oscillator, which is configured to generate the test signal, and a demultiplexer, which is configured to selectively direct, dependent on the first selection signal, the test signal to one of the at least two circuit nodes of the signal processing chain.

5. The RF receive circuit of claim 2 , further comprising:
an analog multiplexer coupled to the signal processing chain and configured to selectively connect, dependent on a second selection signal, one of the at least two circuit nodes with a test pad or an output pin of the RF receive circuit.

6. The RF receive circuit of claim 1 , wherein:
the mixer, the signal processing chain, the ADC and the oscillator circuit are integrated in one chip package.

7. The RF receive circuit of claim 1 , wherein:
the oscillator circuit is configured to vary a fundamental frequency of the test signal.

8. A radio frequency (RF) receive circuit that comprises:
a mixer configured to receive an RF input signal and to down-convert the RF input signal into a base-band or an intermediate frequency (IF) band;
an analog-to-digital converter (ADC);
a signal processing chain coupled between the mixer and the ADC, the signal processing chain including at least two circuit nodes;
a digital signal processing circuit connected to the ADC downstream thereof; and
an oscillator circuit configured to generate a test signal,
wherein the oscillator circuit is coupled to the signal processing chain and configured to selectively feed the test signal into one of the at least two circuit nodes,
the ADC is configured to generate a digital signal by digitizing an output signal of the signal processing chain, the output signal being derived from the test signal, and
the digital signal processing circuit is configured to perform a spectral analysis on frequency values of the digital signal.

9. The RF receive circuit of any of claim 8 , wherein:
the digital signal processing circuit is configured to provide a spectral representation of the digital signal and to compare the spectral representation with a stored reference.

10. A method for testing a radio frequency (RF) receive circuit that includes signal processing chain coupled between a mixer and an analog-to-digital converter (ADC), the method comprising:
selecting, based on a first selection signal, a first circuit node from among at least three selectable circuit nodes of the signal processing chain;
feeding a test signal into the selected first circuit node;
selecting, based on a second selection signal, a second circuit node of the at least three selectable circuit nodes of the signal processing chain;
connecting the selected second circuit node with a test pad or an output pin of the RF receive circuit.

11. The method of claim 10 , wherein:
each one of the at least three circuit nodes is associated with a corresponding oscillator, and
feeding the test signal into the selected first circuit node comprises activating the oscillator associated with the selected first circuit node.

12. The method of claim 11 , wherein feeding a test signal into the selected first circuit node further comprises:
deactivating or leaving deactivated the oscillators not associated with the selected first circuit node.

13. The method of claim 10 , wherein selecting the first circuit node comprises:
configuring, based on the first selection signal, a demultiplexer so that an oscillator is connected with the selected first circuit node.

14. The method of claim 10 , wherein selecting the second circuit node comprises:
configuring, based on the second selection signal, a multiplexer so that the selected second circuit node is connected to the test pad or the output pin.

15. The method of claim 10 , further comprising:
tapping an output signal at the test pad or the output pin;
performing a spectral analysis of the output signal to obtain a spectral representation of the output signal.

16. The method of claim 15 , further comprising:
comparing the spectral representation of the output signal with a stored reference.

17. The method of claim 15 , wherein the output signal is tapped at the test pad or the output pin by automatic test equipment (ATE), which is external to and separate from the RF receive circuit.

18. The method of claim 15 , wherein:
the RF receive circuit is included in a radar sensor device,
the output signal is digitized by the ADC included in the radar sensor device, and
the spectral analysis is performed by a digital signal processor included in the radar sensor device.

19. A system for testing a radio frequency (RF) receive circuit, the system comprising:
automatic test equipment (ATE); and
the RF receive circuit coupled to the ATE during a test;
wherein the RF receive circuit comprises:
a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band;
an analog-to-digital converter (ADC);
a signal processing chain coupled between the mixer and the ADC, the signal processing chain including at least two circuit nodes; and
an oscillator circuit configured to generate a test signal, wherein the oscillator circuit is selectively coupled to the at least two circuit nodes of the signal processing chain and configured to selectively feed the test signal into one of the at least two circuit nodes;

wherein the ATE is configured to cause the oscillator circuit to feed the test signal into a selected one of the at least two circuit nodes.

20. The system of claim 19 , wherein:
the RF receive circuit further comprises an analog multiplexer coupled to the signal processing chain and configured to selectively connect one of the at least two circuit nodes with a test pad or an output pin of the RF receive circuit, and
the ATE is configured to cause the multiplexer to connect a selected one of the at least two circuit nodes with the test pad or the output pin.

21. The sy

Assignees

• Infineon Technologies Ag

Inventors

• Starzer Florian
• Bogner Peter
• Frank Oliver
• Haider Guenter
• Kropfitsch Michael
• Sailer Thomas
• Schrattenecker Jochen O
• Stuhlberger Rainer

Classifications

• H04B1/16

  Circuits · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/195 Primary

  in integrated circuits · CPC title

• H03F2200/165

  A filter circuit coupled to the input of an amplifier · CPC title

• H04W24/06 Primary

  Testing, {supervising or monitoring} using simulated traffic · CPC title