Analog-digital converting device and method, and image sensor including the same

US10057517B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10057517-B2
Application numberUS-201715435500-A
CountryUS
Kind codeB2
Filing dateFeb 17, 2017
Priority dateJun 3, 2016
Publication dateAug 21, 2018
Grant dateAug 21, 2018

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Abstract

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An analog-digital converting device includes a comparison block generating at least one first comparison signal by comparing pixel signals with each other, and for generating second comparison signals by comparing each of the plurality of pixel signals with a ramp signal through a single ramping operation; a feedback control unit determining a data conversion sequence according to the at least one first comparison signal received from the comparison block, and outputting a control signal according to the determined data conversion sequence; a selection block selecting two of the plurality of the pixel signals or at least one of the plurality of the pixel signals and the ramp signal to be applied to the comparison block according to the control signal received from the feedback control unit; and a data conversion unit performing a data conversion on the plurality of pixel signals based on the second comparison signal.

First claim

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What is claimed is: 1. An analog-digital converting device, comprising: a comparison block suitable for generating at least one first comparison signal by comparing a plurality of pixel signals with each other, and for generating a plurality of second comparison signals by comparing each of the plurality of pixel signals with a ramp signal through a single ramping operation; a feedback control unit suitable for determining a data conversion sequence according to the at least one first comparison signal received from the comparison block, and outputting a control signal according to the determined data conversion sequence; a selection block suitable for selecting two of the plurality of the pixel signals or at least one of the plurality of the pixel signals and the ramp signal to be applied to the comparison block according to the control signal received from the feedback control unit; and a data conversion unit suitable for performing a data conversion on the plurality of pixel signals based on the second comparison signal. 2. The analog-digital converting device of claim 1 , wherein the comparison block includes a comparator suitable for comparing the selected pixel signals among the plurality of pixel signals with each other, and for comparing a selected pixel signal among the plurality of pixel signals with the ramp signal, and wherein the comparison block further removes an offset by resetting the comparator through a reference pixel signal. 3. The analog-digital converting device of claim 1 , wherein the comparison block compares each of the plurality of pixel signals, which are selected according to the control signal, with the ramp signal according to the determined data conversion sequence. 4. An analog-digital converting method, comprising: performing a reset operation; generating a first comparison signal by comparing a plurality of pixel signals with each other; determining a data conversion sequence according to the first comparison signal; generating a control signal according to the determined data conversion sequence; selecting the plurality of pixel signals and a ramp signal according to the control signal; and performing a data conversion on the plurality of pixel signals by comparing each of the plurality of pixel signals, which are selected according to the control signal, with the ramp signal through a single ramping operation. 5. The analog-digital converting method of claim 4 , wherein the performing of the reset operation includes removing an offset for the comparing of the plurality of pixel signals with each other using a reference pixel signal. 6. A complementary metal oxide semiconductor (CMOS) image sensor, comprising: a pixel array suitable for outputting a pixel signal corresponding to an incident light; a row decoder suitable for selecting and controlling a pixel at each row lines of the pixel array; a ramp signal generation unit suitable for generating a ramp signal; a comparison unit suitable for comparing a plurality of pixel signals outputted from the pixel array, determining a data conversion sequence of the pixel signals, and comparing each of the plurality of pixel signals with the ramp signal through a single ramping operation; a counting unit suitable for counting a clock according to a comparison signal of the comparison unit; a memory unit suitable for storing a counting information of the counting unit; and a column read-out circuit suitable for outputting a data of the memory unit. 7. The CMOS image sensor of claim 6 , wherein the comparison unit includes a comparison block suitable for generating a first comparison signal by comparing the plurality of pixel signals with each other, and generating a second comparison signal by comparing each of the plurality of pixel signals with the ramp signal through the single ramping operation; a feedback control unit suitable for determining the data conversion sequence according to the first comparison signal, and outputting a control signal according to the determined data conversion sequence; a selection block suitable for selecting the plurality of pixel signals and the ramp signal applied to the comparison block according to the control signal; and a data conversion unit suitable for performing a data conversion on the plurality of pixel signals based on the second comparison signal. 8. The CMOS image sensor of claim 7 , wherein the comparison block includes a comparator suitable for comparing the selected pixel signals among the plurality of pixel signals with each other, and for comparing a selected pixel signal among the plurality of pixel signals with the ramp signal, and wherein the comparison block further removes an offset by resetting the comparator through a reference pixel signal. 9. The CMOS image sensor of claim 8 , wherein the comparison block compares each of the plurality of pixel signals, which are selected according to the control signal, with the ramp signal according to the determined data conversion sequence.

Assignees

Inventors

Classifications

  • applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS · CPC title

  • H04N25/616Primary

    involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling · CPC title

  • Electricity · mapped topic

  • Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters · CPC title

  • Electricity · mapped topic

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What does patent US10057517B2 cover?
An analog-digital converting device includes a comparison block generating at least one first comparison signal by comparing pixel signals with each other, and for generating second comparison signals by comparing each of the plurality of pixel signals with a ramp signal through a single ramping operation; a feedback control unit determining a data conversion sequence according to the at least …
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification H04N25/616. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 21 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).