Digital-to-analog converter

Patent metadata

Field	Value
Publication number	US-10056915-B2
Application number	US-201514937175-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Jul 16, 2015
Publication date	Aug 21, 2018
Grant date	Aug 21, 2018

Abstract

A digital-to-analog converter (DAC) circuit includes a first DAC that produces a first analog output signal based upon a received multi-bit digital signal and upon a received clock. A second DAC that produces a second analog output signal based upon the received multi-bit digital signal and upon the received clock, wherein the first and second DACs are connected in parallel and process the same multi-bit digital signal. In one embodiment, the DACs produce differential signals. A low pass filter connected to receive the first and second analog outputs is configured to sum the first and second analog outputs and to filter the summed first and second analog outputs to produce an ingoing analog signal. An amplifier is connected to receive the ingoing analog signal to produce an amplified ingoing analog signal.

First claim

What is claimed is:

1. A digital-to-analog converter (DAC) circuit, comprising:
a first DAC that receives a multi-bit digital signal and that produces a first analog output signal based upon the received multi-bit digital signal and upon a received clock;
a second DAC that receives the multi-bit digital signal and that produces a second analog output signal based upon the received multi-bit digital signal and upon the received clock, wherein the first and second DACs are connected in parallel and receive the same multi-bit digital signal at respective inputs;
a low pass filter connected to receive the first and second analog outputs and configured to sum the first and second analog outputs and to filter the summed first and second analog outputs to produce an ingoing analog signal; and
an amplifier connected to receive the ingoing analog signal to produce an amplified ingoing analog signal,
wherein the amplifier produces the amplified ingoing analog signal having a signal component that is amplified by a factor of N while a noise component is only amplified by a factor of the square root of N where N represents a number of parallel connected DACs.

2. The DAC circuit of claim 1 wherein the first and second DACs each produce differential first and second analog output signals, respectively.

3. The DAC circuit of claim 2 wherein the low pass filter is configured to receive the differential first and second analog output signals and sum and filter the differential first and second analog output signals to produce a differential ingoing analog signal.

4. The DAC circuit of claim 3 wherein the amplifier receives the differential ingoing analog signal at plus and minus input terminals and produces an amplified ingoing analog signal that is single ended at an amplifier output.

5. The DAC circuit of claim 1 wherein a first RC filter comprising parallel coupled resistive and capacitive elements is connected across a first input terminal of the amplifier and to an amplifier output to create a filtered feedback path.

6. The DAC circuit of claim 1 wherein a second input terminal of the amplifier is connected to a first common node of a second RC filter comprising parallel coupled resistive and capacitive elements and wherein a second node of the second RC filter is connected to one of ground or circuit common.

7. The DAC circuit of claim 1 wherein each of the first and second DACs comprises multi-bit switched capacitor type DACs having “n” inputs connected to receive the multi-bit digital signal in parallel and wherein the received clock drives the first and second DACs to convert the received multi-bit digital signal to analog signals.

8. The DAC circuit of claim 7 wherein each of the “n” inputs of first and second DACs is connected to a one of a capacitor or a capacitor bank.

9. The DAC circuit of claim 1 wherein:
a first plurality of capacitor banks are connected to receive and process the “plus” side of a differential multi-bit digital data;
each capacitor bank of the first plurality of capacitor banks has a commonly connected output node that is further connected to a first input terminal of a DAC amplifier;
a second plurality of capacitor banks are connected to receive and process the “minus” side of the differential multi-bit digital data; and
each capacitor bank of the second plurality of capacitor banks has a commonly connected output node that is further connected to a second input terminal of the DAC amplifier.

10. The DAC circuit of claim 1 further comprising at least three parallel connected DACs that produce analog output signals based upon the received multi-bit digital signal and upon the received clock.

11. A signal processing system, comprising:
a data source that generates an outgoing digital signal;
a digital processing circuit configured to interpolate, modulate and produce digital data that is formatted based on the outgoing digital signal;
a signal conversion block comprising a plurality of parallel connected digital-to-analog converters (DACs) configured to convert the digital signal to produce an outgoing analog signal having a signal-to-noise ratio that is amplified by a ratio that is equal to or greater than N/(square root of N) where N represents a number of parallel connected DACs, wherein the signal conversion block comprises:
a first DAC that produces a first analog output signal based upon a received multi-bit digital signal and upon a received clock;
a second DAC that produces a second analog output signal based upon the received multi-bit digital signal and upon the received clock, wherein the first and second DACs are connected in parallel and process the same multi-bit digital signal;
a low pass filter connected to receive the first and second analog outputs and configured to sum the first and second analog outputs and to filter the summed first and second analog outputs to produce an ingoing analog signal; and
an amplifier connected to receive the ingoing analog signal to produce an amplified ingoing analog signal; and

an analog processing circuit that processes the analog signal.

12. The signal processing system of claim 11 wherein the analog processing circuit comprises at least one of an analog front end of a radio and an audio processing circuit for producing an audio signal for being converted to sound by at least one speaker.

13. The signal processing system of claim 11 wherein the signal conversion block further comprises:
a third DAC that produces a third analog output signal based upon the received multi-bit digital signal and upon the received clock, wherein the first, second and third DACs are connected in parallel and process the same multi-bit digital signal;
wherein the low pass filter is further connected to receive the first, second and third analog outputs and configured to sum the first, second and third analog outputs and to filter the summed first, second and third analog outputs to produce the ingoing analog signal.

14. A method for processing a signal, comprising:
receiving a multi-bit digital signal and a clock;
producing a first analog output signal from a first digital-to-analog converter (DAC) based upon the multi-bit digital signal and the clock;
producing a second analog output signal from a second DAC based upon the multi-bit digital signal and the clock; and
low pass filtering and summing the first and second analog output signals with a combined summing and lowpass filtering circuit and producing an amplified outgoing analog signal having a signal-to-noise ratio that is amplified by a ratio that is equal to or greater than N/(square root of N) where N represents a number of parallel connected DACs.

15. The method of claim 14 further including interpolating, modulating, formatting and producing the multi-bit digital signal based on an outgoing digital signal prior to producing the first or second analog output signals.

16. The method of claim 14 further including processing and wirelessly transmitting the outgoing analog signal by an analog front end of a radio.

17. The method of claim 14 further including audio processing the outgoing analog signal by audio processing circuitry and producing an audio signal at least one speaker.

18. The method of claim 14 wherein producing the first and second analog output signals includes converting the multi-bit digital signal in one or more capacitive type DACs.

19. The DAC circuit of claim 3 wherein the low pass filter comprises:
a first resistor having a first terminal for receiving a negative component o

Assignees

• Semiconductor Components Ind Llc

Inventors

• Onishi Akinobu

Classifications

• H03M1/661 Primary

  Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal, e.g. by interpolation, by curve-fitting, by smoothing · CPC title

• H03F2200/03

  the amplifier being designed for audio applications · CPC title

• H03F2203/45526

  the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC · CPC title

• H03M3/508

  Details relating to the interpolation process · CPC title

• H03M3/51

  Automatic control for modifying converter range · CPC title