Apparatus and method of forming an apparatus comprising a two dimensional material

US10056513B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10056513-B2
Application numberUS-201715427465-A
CountryUS
Kind codeB2
Filing dateFeb 8, 2017
Priority dateFeb 12, 2016
Publication dateAug 21, 2018
Grant dateAug 21, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and apparatus, the method comprising: forming first electrode portions on a substrate; providing a sheet of two dimensional material overlaying at least part of the first electrode portions; forming second electrode portions on a superstrate; positioning the superstrate overlaying the substrate so that the second electrode portions are aligned with the first electrode portions; and laminating the substrate and the superstrate together so that the sheet of two dimensional material is positioned between the aligned first electrode portions and the second electrode portions.

First claim

Opening claim text (preview).

We claim: 1. A method comprising: forming first electrode portions on a substrate; providing a sheet of material overlaying at least part of the first electrode portions; forming second electrode portions on a superstrate; positioning the superstrate overlaying the substrate so that the second electrode portions are aligned with the first electrode portions; and laminating the substrate and the superstrate together so that the sheet of material is positioned between the aligned first electrode portions and the second electrode portions; wherein the first electrode portions and/or the second electrode portions are formed to have an uneven surface to reduce resistance to the material. 2. A method as claimed in claim 1 wherein the uneven surface comprises a plurality of indents. 3. A method as claimed in claim 1 further comprising adding a layer of metal nanostructures to the uneven surface. 4. A method as claimed in claim 1 further comprising etching the uneven surface. 5. A method as claimed in claim 1 wherein the sheet of material comprises graphene. 6. A method as claimed in claim 1 wherein the sheet of material is functionalised with quantum dots. 7. A method as claimed in claim 1 wherein the first electrode portions and the second electrode portions are galvanically connected. 8. A method as claimed in claim 7 wherein the uneven surface enables the first electrode portions and/or the second electrode portions to at least partially puncture through the sheet of material. 9. A method as claimed in claim 1 further comprising forming electrical connections to the first electrode portions on the substrate. 10. A method as claimed in claim 1 wherein the electrode portions are configured to provide a source electrode and a drain electrode. 11. A method as claimed in claim 1 wherein the electrode portions are configured to provide a plurality of source and drain electrodes. 12. A method as claimed in claim 11 wherein the material is provided as a continuous sheet between the plurality of source and drain electrodes. 13. A method as claimed in claim 1 further comprising forming a gate electrode within the substrate. 14. A method as claimed in claim 1 wherein the electrode portions and the material form a field effect transistor. 15. A method as claimed in claim 1 wherein the electrode portions are arranged so that a first electrode is enclosed by a second electrode. 16. A method as claimed in claim 1 wherein the superstrate provides an encapsulation layer. 17. A method as claimed in claim 1 wherein the superstrate comprises a scintillator. 18. A method for the manufacture of an apparatus, the method comprising: forming first electrode portions on a substrate; providing a sheet of material overlaying at least part of the first electrode portions; forming second electrode portions on a superstrate; positioning the superstrate overlaying the substrate so that the second electrode portions are aligned with the first electrode portions; and laminating the substrate and the superstrate together so that the sheet of material is positioned between the aligned first electrode portions and the second electrode portions; wherein the first electrode portions and/or the second electrode portions are formed to have an uneven surface to reduce resistance to the material. 19. An apparatus comprising: first electrode portions on a substrate; a sheet of material overlaying at least part of the first electrode portions; second electrode portions on a superstrate; wherein the superstrate is positioned overlaying the substrate so that the second electrode portions are aligned with the first electrode portions; wherein the substrate and the superstrate are laminated together so that the sheet of material is positioned between the aligned first electrode portions and the second electrode portions; and wherein the first electrode portions and/or the second electrode portions are formed to have an uneven surface to reduce resistance to the material. 20. An apparatus as claimed in claim 19 wherein the uneven surface comprises a plurality of indents.

Assignees

Inventors

Classifications

  • using a combination of a scintillator and photodetector which measures the means radiation intensity · CPC title

  • Circuits specially adapted for scintillation detectors, e.g. for the photo-multiplier section · CPC title

  • Scintillation-photodiode combinations · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US10056513B2 cover?
A method and apparatus, the method comprising: forming first electrode portions on a substrate; providing a sheet of two dimensional material overlaying at least part of the first electrode portions; forming second electrode portions on a superstrate; positioning the superstrate overlaying the substrate so that the second electrode portions are aligned with the first electrode portions; and lam…
Who is the assignee on this patent?
Nokia Technologies Oy
What technology area does this patent fall under?
Primary CPC classification H01L31/035218. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 21 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).