Electronic device

Patent metadata

Field	Value
Publication number	US-10056309-B2
Application number	US-201715655617-A
Country	US
Kind code	B2
Filing date	Jul 20, 2017
Priority date	Aug 10, 2016
Publication date	Aug 21, 2018
Grant date	Aug 21, 2018

Abstract

Each of first and second semiconductor devices mounted on a substrate includes an emitter terminal electrically connected with a front surface electrode of a semiconductor chip and exposed from a main surface of a sealing body located on a front surface side of the semiconductor chip. Each of the first and second semiconductor devices includes a collector terminal electrically connected with a back surface electrode of the semiconductor chip and exposed from the main surface of the sealing body located on a back surface side of the semiconductor chip. The collector terminal of the first semiconductor device is electrically connected with the emitter terminal of the second semiconductor device via a conductor pattern formed on an upper surface of the substrate.

First claim

What is claimed is:

1. An electronic device comprising:
a casing;
first, second, third, and fourth external terminals exposed from the casing;
a substrate including a first surface and a first conductor pattern formed on the first surface;
a first semiconductor device mounted on the first surface of the substrate; and
a second semiconductor device mounted on the first surface of the substrate,
wherein each of the first and second semiconductor devices comprises:
a first semiconductor chip having a power transistor, and including a first front surface, a first front surface electrode formed on the first front surface, a second front surface electrode formed on the first front surface, a first back surface opposite the first front surface, and a first back surface electrode formed on the first back surface;
a first terminal electrically connected with the first front surface electrode of the first semiconductor chip;
a second terminal facing the first front surface of the first semiconductor chip, and electrically connected with the second front surface electrode of the first semiconductor chip;
a third terminal facing the first back surface of the first semiconductor chip, and electrically connected with the first back surface electrode of the first semiconductor chip; and
a sealing body including a first main surface, a second main surface opposite the first main surface, and a side surface between the first main surface and the second main surface, and sealing the first semiconductor chip,

wherein the first terminal protrudes outside from the side surface of the sealing body,
wherein the second terminal is exposed from the first main surface of the sealing body,
wherein the third terminal is exposed from the second main surface of the sealing body,
wherein the second main surface of the sealing body of the first semiconductor device faces the first surface of the substrate,
wherein the first main surface of the sealing body of the second semiconductor device faces the first surface of the substrate,
wherein the first back surface electrode of the first semiconductor device is electrically connected with the second front surface electrode of the second semiconductor device via the third terminal of the first semiconductor device and the first conductor pattern formed on the first surface of the substrate,
wherein the first front surface electrode of the first semiconductor device is electrically connected with the first external terminal via the first terminal of the first semiconductor device,
wherein the first front surface electrode of the second semiconductor device is electrically connected with the second external terminal via the first terminal of the second semiconductor device,
wherein the second front surface electrode of the first semiconductor device is electrically connected with the third external terminal via the second terminal of the first semiconductor device and a first conductor bar arranged on the first main surface of the sealing body of the first semiconductor device, and
wherein the first back surface electrode of the second semiconductor device is electrically connected with the fourth external terminal via the third terminal of the second semiconductor device and a second conductor bar arranged on the second main surface of the sealing body of the second semiconductor device.

2. The electronic device according to claim 1 ,
wherein the casing includes a fifth external terminal, and
wherein the first conductor pattern is connected with the fifth external terminal.

3. The electronic device according to claim 2 ,
wherein a path distance of a first path electrically connecting the third external terminal and the second front surface electrode of the first semiconductor device is shorter than a path distance of a second path electrically connecting the fifth external terminal and the first back surface electrode of the first semiconductor device.

4. The electronic device according to claim 2 ,
wherein a path distance of a third path electrically connecting the fourth external terminal and the second front surface electrode of the second semiconductor device is shorter than a path distance of a second path electrically connecting the fifth external terminal and the first back surface electrode of the first semiconductor device.

5. The electronic device according to claim 1 ,
wherein each of the first and second conductor bars is electrically separated from all of conductor patterns including the first conductor pattern formed on the first surface of the substrate.

6. The electronic device according to claim 1 ,
wherein the first surface of the substrate is covered with the casing.

7. The electronic device according to claim 1 ,
wherein the first terminal of the first semiconductor device is connected with the first external terminal without interposing the substrate, and
wherein the first terminal of the second semiconductor device is connected with the second external terminal without interposing the substrate.

8. The electronic device according to claim 7 ,
wherein the first terminal of the first semiconductor device has, in a thickness direction of the sealing body, a bent portion that bends from a side of the second main surface toward a side of the first main surface, and
wherein the first terminal of the second semiconductor device has, in the thickness direction of the sealing body, a bent portion that bends from the side of the first main surface toward the side of the second main surface.

9. The electronic device according to claim 1 ,
wherein the substrate includes: a base material made of metal, an insulating film lying on one surface of the base material and having a thickness thinner than a thickness of the base material; and the first conductor pattern lying on the insulating film.

10. The electronic device according to claim 1 ,
wherein each of the first and second semiconductor devices includes a second semiconductor chip, the second semiconductor chip having a second front surface, a third front surface electrode formed on the second front surface, a second back surface opposite the second front surface, and a second back surface electrode formed on the second back surface,
wherein the second front surface electrode of the first semiconductor chip and the third front surface electrode of the second semiconductor chip are electrically connected via the second terminal, and
wherein the first back surface electrode of the first semiconductor chip and the second back surface electrode of the second semiconductor chip are electrically connected via the third terminal.

11. The electronic device according to claim 1 ,
wherein first, second, and third units arranged along a first direction in a plane view are mounted on the substrate,
wherein each of the first, second, and third units includes the first and second semiconductor devices,
wherein the first conductor bar includes a first portion extending along the first direction, and is connected with the second terminal of the first semiconductor device of the first unit, the second terminal of the first semiconductor device of the second unit, and the second terminal of the first semiconductor device of the third unit, and
wherein the second conductor bar includes a second portion extending along the first direction, and is connected with the third terminal of the second semiconductor device of the first unit, the third terminal of the second semiconductor device of the second unit, and the third terminal of the second semiconductor device of the third unit.

12. The electronic device according to claim 11 ,
wherein the first portion of the

Assignees

• Renesas Electronics Corp

Inventors

• Bando Koji
• Muto Akira

Classifications

• H10W72/646

  the connected ends being on auxiliary connecting means on bond pads, e.g. on a bump connector · CPC title

• H10W72/5524

  comprising aluminium [Al] · CPC title

• H10W90/763

  between laterally-adjacent chips · CPC title

• H10W72/534

  being rectangular · CPC title

• H10W72/5522

  comprising gold [Au] · CPC title