Methods of manufacturing printed circuit board and semiconductor package

Patent metadata

Field	Value
Publication number	US-10049970-B2
Application number	US-201615183868-A
Country	US
Kind code	B2
Filing date	Jun 16, 2016
Priority date	Jun 17, 2015
Publication date	Aug 14, 2018
Grant date	Aug 14, 2018

Abstract

A method of manufacturing a semiconductor package according to the present inventive concepts comprises preparing a printed circuit board (PCB) including a protected layer, exposing a portion of the protected layer from the insulating layer, forming a solder ball land by processing the exposed surface of the protected layer, forming a solder ball on the solder ball land, and mounting a semiconductor chip on the solder ball formed on the PCB. The solder balls include copper of about 0.01 wt % to about 0.5 wt %.

First claim

What is claimed is:

1. A method of manufacturing a printed circuit board (PCB), the method comprising:
preparing a substrate including an insulating layer and a protected layer;
exposing the protected layer through the insulating layer;
forming a first metal layer on the protected layer;
forming a second metal layer on the first metal layer, the second metal layer including copper;
forming an organic solderability preservative (OSP) film on the second metal layer;
removing the OSP using a flux; and
placing, after the removing, a solder ball on the second metal layer.

2. The method of claim 1 , wherein the protected layer is a conductive pattern including copper.

3. The method of claim 1 , wherein the first metal layer includes nickel.

4. The method of claim 1 , wherein a height of the first metal layer ranges from about 1 μm to about 20 μm.

5. The method of claim 1 , wherein a height of the second metal layer ranges from about 0.05 μm to about 2 μm.

6. The method of claim 5 , wherein the height of the second metal layer ranges from about 0.15 μm to about 0.95 μm.

7. The method of claim 1 , wherein a height of the OSP film ranges from about 0.05 μm to about 2 μm.

8. A method of manufacturing a semiconductor package, the method comprising:
preparing a printed circuit board (PCB) including a protected layer;
exposing a portion of the protected layer;
forming a solder ball land by processing the exposed surface of the protected layer;
forming a solder ball on the solder ball land; and
mounting a semiconductor chip on the solder ball formed on the PCB,
wherein the solder ball includes copper of about 0.01 wt % to about 0.5 wt %,
wherein the forming a solder ball land includes,
forming a nickel layer on the protected layer,
forming a copper layer on the nickel layer, and
forming an organic solderability preservative (OSP) film on the copper layer, and

wherein the forming a solder ball includes,
removing the OSP film,
providing the solder ball on the copper layer, and
dissolving the copper layer into the solder ball such that the solder ball and the nickel layer are bonded to each other.

9. The method of claim 8 , wherein the solder ball is an unleaded solder ball including tin.

10. The method of claim 9 , wherein after the dissolving, an intermetallic compound including an alloy of nickel, copper, and tin are formed between the nickel layer and the solder ball.

11. The method of claim 8 , wherein the removing the OSP includes removing the OSP film by coating the OSP film with flux including an alcoholic component and an acidic component.

12. The method of claim 8 , wherein a height of the copper layer before the dissolving ranges from about 0.15 μm to about 0.95 μm; and
after completing the dissolving, the solder ball includes copper of about 0.01 wt % to about 0.5 wt %.

13. The method of claim 8 , wherein a height of the nickel layer ranges from about 1 μm to about 20 μm, and
a height of the OSP film ranges from about 0.05 μm to about 2 μm.

14. A method of manufacturing a printed circuit board (PCB), the method comprising:
forming a stack of a first metal layer, a second metal layer, and a oxidation prevention layer on a solder ball land in the PCB,
removing the oxidation prevention layer using a flux, and
placing, after the removing, a solder ball on the second metal layer.

15. The method of claim 14 , wherein the first metal layer includes a first material that at least inhibits a second material in the second metal layer from dissolving into the solder ball land.

16. The method of claim 15 , wherein the first material is nickel.

17. The method of claim 14 , further comprising:
performing soldering such that the second metal layer is dissolved into the solder ball.

18. The method of claim 14 , further comprising:
performing soldering such that the second metal layer is dissolved into the solder balls, while leaving an intermetallic compound on the first metal layer.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Liu Hai

Classifications

• H10W70/687

  characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W90/26

  the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape · CPC title

• H10W90/297

  characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

• H10W72/073

  of die-attach connectors · CPC title