Methods and apparatus for improved fault analysis

US10048995B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10048995-B1
Application numberUS-201715445369-A
CountryUS
Kind codeB1
Filing dateFeb 28, 2017
Priority dateMar 28, 2013
Publication dateAug 14, 2018
Grant dateAug 14, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method includes receiving a signal indicative of a value of a data point associated with a compute device at a first time. The value of the data point includes a data point category that is correlated with a fault category. The compute device is operatively coupled to a record module having a protected mode and an unprotected mode. A signal is received indicative of a value of the data point at a second time, after the first time. When a characteristic of a change in the value of the data point at the first time to value of the data point at the second time crosses a threshold in a first direction, a signal is sent to the record module indicative of an instruction to record data associated with the compute device in the protected mode to define a protected data set.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a memory; and a processor operatively coupled to the memory, the processor configured to: receive, from a compute device, a signal indicative of a first performance value associated with a data point category of the compute device at a first time, the data point category being correlated with a fault category of the compute device, receive, from the compute device, a signal indicative of a second performance value associated with the data point category of the compute device at a second time after the first time, store in the memory a protected data set, when 1 the first performance value and the second performance value are not greater than a fault state value associated with the compute device, 2) the second performance value is closer to the fault state value than the first performance value and, 3) a difference between the first performance value and the second performance value is greater than a predetermined threshold value such that, the protected data set is protected from being overwritten by the processor and includes data associated with an operative status of the compute device indicative of a trend of the compute device towards the fault category, receive, from the compute device a signal indicative of a third performance value associated with the data point category of the compute device at a third time after the second time, and store in the memory an unprotected data set, when 1) the third performance value is not greater than the fault state value and farther from the fault state value than the second performance value, and 2) a difference between the second performance value and the third performance value is greater than the predetermined threshold value such that, the unprotected data set is not protected from being overwritten by the processor at a fourth time after the third time. 2. The apparatus of claim 1 , wherein the processor is further configured to: send a signal to the compute device indicative of an instruction to deliver a diagnostic message to a user of the compute device when the protected data set is stored in the memory. 3. The apparatus of claim 1 , wherein the predetermined threshold value is a first predetermined threshold value, the processor further configured to: receive a signal indicative of a fourth performance value associated with the data point category of the compute device at a fifth time after the second time and before the third time, determine whether a difference between the second performance value and the fourth performance value crosses a second predetermined threshold value, and send a signal to the compute device indicative of an instruction to deliver a second diagnostic message to a user to the compute device. 4. The apparatus of claim 1 , wherein the data point category of the compute device is a page faults and the fault category of the compute device is a slow system fault. 5. The apparatus of claim 1 , wherein the predetermined threshold value is a first predetermined threshold value, the processor further configured to: send to the compute device, a signal indicative of an alarm when a fourth performance value associated with the data point category of the compute device and received from the compute device at a fifth time after the second time and before the third time, crosses a second redetermined threshold value, the fourth performance value 1) is not greater than the fault state value associated with the compute device, 2) the fourth performance value is closer to the fault state value than the third performance value. 6. The apparatus of claim 1 , wherein the data point category of the compute device is a first data point category, and the processor further configured to: analyze the protected data set to define a correlation between a second data point category of the compute device and the fault category of the compute device. 7. A non-transitory processor-readable medium storing code representing instructions to be executed by a processor, the code comprising instructions that when executed by the processor cause the processor to: store in a memory configured to operate in an unprotected mode an unprotected data set with operative status data captured from a compute device, the unprotected data set not protected from being overwritten by the processor, receive a first performance value of a data point category of the compute device captured from the compute device at a first time, the data point category associated with a first diagnostic rule, receive a second performance value of the data point category of the compute device captured from the compute device at a second time, send a command signal to the memory based on the first diagnostic rule and a change between the first performance value and the second performance value, such that, the memory operates in a protected mode, store in the memory configured to operate in the protected mode, a protected dataset with operative status data captured from the compute device, the protected data set is protected from being overwritten by the processor, and analyze, at least one of an event or a condition included in the operative status data of the protected data set, based on a second diagnostic rule associated with a fault status of the compute device, a rate of the change between the first performance value and the second performance value, and the at least one of the event or the condition. 8. The non-transitory processor-readable medium of claim 7 , wherein the data point category is a first data point category, the command signal is a first command signal, and the protected data set is a first protected dataset, and the non-transitory processor-readable medium further storing code representing instructions that when executed by the processor cause the processor to: receive a signal indicative of a change between a first performance value of a second data point category of the compute device, at a third time and a second performance value of the second data point category of the compute device, at a fourth time, the second data point category of the compute device associated with the second diagnostic rule, and send a second command signal to the memory indicative of an instruction to store a second protected data set with operative status data of the compute device and at least one characteristic of the change between the first performance value of the second data point category of the compute device and the second performance value of the second data point category of the compute device. 9. The non-transitory processor-readable medium of claim 7 , wherein the first diagnostic rule is associated with page faults. 10. The non-transitory processor-readable medium of claim 7 , wherein the protected data set is a first protected data set and the command signal is a first command signal, the non-transitory processor-readable medium further storing code representing instructions that when executed by the processor cause the processor to: receive prior to the first time, a signal from the compute device with an indication of a fault associated with the first diagnostic rule, and send, in response to the indication, a second command signal to the memory to store a second protected data set with operative status data-captured from the compute device. 11. The non-transitory processor-readable medium of claim 7 , further storing code representing instructions that when executed by the processor cause the processor to: send to a network access device, a signal configured to modify an operation of the compute device, based on at least one characteristic of the change between the first performance value and the seco

Assignees

Inventors

Classifications

  • the data filtering being achieved by reporting only the changes of the monitored data · CPC title

  • Storage of error reports, e.g. persistent data storage, storage using memory protection · CPC title

  • where the reporting involves data filtering, e.g. pattern matching, time or event triggered, adaptive or policy-based reporting · CPC title

  • Readable error formats, e.g. cross-platform generic formats, human understandable formats · CPC title

  • by exceeding limits · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10048995B1 cover?
A method includes receiving a signal indicative of a value of a data point associated with a compute device at a first time. The value of the data point includes a data point category that is correlated with a fault category. The compute device is operatively coupled to a record module having a protected mode and an unprotected mode. A signal is received indicative of a value of the data point …
Who is the assignee on this patent?
Juniper Networks Inc
What technology area does this patent fall under?
Primary CPC classification G06F11/0754. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 14 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).