Image sensors with noise reduction
US-2016037099-A1 · Feb 4, 2016 · US
US10044948B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10044948-B2 |
| Application number | US-201514939868-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 12, 2015 |
| Priority date | Nov 12, 2015 |
| Publication date | Aug 7, 2018 |
| Grant date | Aug 7, 2018 |
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A pixel cell includes a photodiode to accumulate image charge. A global shutter transistor is coupled to the photodiode to reset the image charge in the photodiode in response to a global shutter control signal. A global shutter control signal generator circuit generates the global shutter control signal to have a first value signal or a second value signal. The first value signal is coupled to turn on the global shutter transistor to reset the photodiode. The second value signal controls the global shutter transistor to be in a low leakage off mode. A supply circuit is coupled to provide the second value signal to the global shutter control signal generator circuit. The supply circuit includes a variable filter circuit coupled to an output of the supply circuit to selectively vary a bandwidth of the second value signal in response to a bandwidth select signal.
Opening claim text (preview).
What is claimed is: 1. A pixel cell, comprising: a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed to the photodiode; a global shutter transistor disposed in the semiconductor material and coupled to the photodiode to selectively reset the image charge in the photodiode in response to a global shutter control signal; a global shutter control signal generator circuit coupled to generate the global shutter control signal to have a first value signal or a second value signal, wherein the first value of the global shutter control signal is coupled to turn on the global shutter transistor to reset the photodiode, wherein the second value of the global shutter control signal is coupled to control the global shutter transistor to be in a low leakage off mode; and a supply circuit coupled to provide the second value signal to the global shutter control signal generator circuit, wherein the supply circuit includes a variable filter circuit coupled to an output of the supply circuit to selectively vary a bandwidth of the second value signal in response to a bandwidth select signal, wherein the variable filter circuit is coupled to selectively vary the bandwidth of the second voltage signal between a first bandwidth and a second bandwidth, wherein the first bandwidth is larger than the second bandwidth. 2. The pixel cell of claim 1 , wherein the variable filter circuit includes a variable RC filter circuit coupled to the output of the supply circuit to selectively vary the bandwidth of the second value signal in response to the bandwidth select signal. 3. The pixel cell of claim 1 , wherein the variable filter circuit includes a variable resistor circuit and a capacitor coupled to the output of the supply circuit to selectively vary the bandwidth of the second value signal in response to the bandwidth select signal. 4. The pixel cell of claim 3 , wherein the variable resistor circuit comprises: a first resistor coupled to the capacitor; a switch coupled to the first resistor; and a second resistor coupled to the capacitor and the switch, wherein the switch is coupled to selectively couple the second resistor across the first resistor in parallel to vary a total resistance of the variable resistor circuit to vary an RC time constant of the variable filter circuit in response to the bandwidth select signal. 5. The pixel cell of claim 1 , wherein the supply circuit further comprises an N-pump supply circuit coupled to provide the second value signal. 6. The pixel cell of claim 1 , wherein the first value signal is a positive voltage, and wherein the second value signal is a negative voltage. 7. The pixel cell of claim 1 further comprising a storage transistor disposed in the semiconductor material to store the image charge accumulated in the photodiode. 8. The pixel cell of claim 7 further comprising a transfer transistor disposed in the semiconductor material and coupled between the photodiode and the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. 9. The pixel cell of claim 8 further comprising an output transistor disposed in the semiconductor material and coupled to the storage transistor to selectively transfer the image charge from the storage transistor to a readout node. 10. The pixel cell of claim 9 wherein the readout node comprises a floating diffusion disposed in the semiconductor material. 11. The pixel cell of claim 9 further comprising: a reset transistor disposed in the semiconductor material and coupled to the readout node; an amplifier transistor disposed in the semiconductor material having an amplifier gate coupled to the readout node; and a row select transistor disposed in the semiconductor material coupled between a bitline and the amplifier transistor. 12. An imaging system, comprising: a pixel array of pixel cells, wherein each one of the pixel cells includes: a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed to the photodiode; a global shutter transistor disposed in the semiconductor material and coupled to the photodiode to selectively reset the image charge in the photodiode in response to a global shutter control signal; a global shutter control signal generator circuit coupled to generate the global shutter control signal to have a first value signal or a second value signal, wherein the first value of the global shutter control signal is coupled to turn on the global shutter transistor to reset the photodiode, wherein the second value of the global shutter control signal is coupled to control the global shutter transistor to be in a low leakage off mode; and a supply circuit coupled to provide the second value signal to the global shutter control signal generator circuit, wherein the supply circuit includes a variable filter circuit coupled to an output of the supply circuit to selectively vary a bandwidth of the second value signal in response to a bandwidth select signal, wherein the variable filter circuit is coupled to selectively vary the bandwidth of the second voltage signal between a first bandwidth and a second bandwidth, wherein the first bandwidth is larger than the second bandwidth; control circuitry coupled to the pixel array to control operation of the pixel array; and readout circuitry coupled to the pixel array to readout image data from the plurality of pixels. 13. The imaging system of claim 12 further comprising function logic coupled to the readout circuitry to store the image data from each one of the plurality of pixel cells. 14. The imaging system of claim 12 , wherein the variable filter circuit includes a variable RC filter circuit coupled to the output of the supply circuit to selectively vary the bandwidth of the second value signal in response to the bandwidth select signal. 15. The imaging system of claim 12 , wherein the variable filter circuit includes a variable resistor circuit and a capacitor coupled to the output of the supply circuit to selectively vary the bandwidth of the second value signal in response to the bandwidth select signal. 16. The imaging system of claim 15 , wherein the variable resistor circuit comprises: a first resistor coupled to the capacitor; a switch coupled to the first resistor; and a second resistor coupled to the capacitor and the switch, wherein the switch is coupled to selectively couple the second resistor across the first resistor in parallel to vary a total resistance of the variable resistor circuit to vary an RC time constant of the variable filter circuit in response to the bandwidth select signal. 17. The imaging system of claim 12 , wherein the first value signal is a positive voltage, and wherein the second value signal is a negative voltage. 18. The imaging system of claim 12 , wherein each one of the pixel cells further comprises: a storage transistor disposed in the semiconductor material to store the image charge accumulated in the photodiode; a transfer transistor disposed in the semiconductor material and coupled between the photodiode and the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor; an output transistor disposed in the semiconductor material and coupled to the storage transistor to selectively transfer the image charge from the storage transistor to a readout node; a reset transistor disposed in the semiconductor material and coupled to the readout node; an amplifier transistor
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