Methods and apparatus for DC-DC soft start

Patent metadata

Field	Value
Publication number	US-10044271-B1
Application number	US-201715581747-A
Country	US
Kind code	B1
Filing date	Apr 28, 2017
Priority date	Apr 28, 2017
Publication date	Aug 7, 2018
Grant date	Aug 7, 2018

Abstract

Methods and apparatus for DC-DC soft start are disclosed herein, an example DC-DC voltage converter includes at least two transistors to at least charge or discharge an inductor from an input source and to ground respectively, the inductor to output an output voltage. A synchronize and track circuit generates a bias current based on a reference voltage. An amplifier generates an error current based on an output voltage and the reference voltage. An oscillator oscillates at a switching frequency based on the bias current and the error current. A multiplexer selects between (1) a first input signal generated based on the switching frequency, and (2) a second input signal generated based on the switching frequency and the error current, for output as a reset signal. A latch provides a control signal to the at least two transistors based on the reset signal and the switching frequency.

First claim

What is claimed is:

1. A DC-DC voltage converter comprising:
at least first and second transistors to charge or discharge an inductor, the inductor to output an output voltage;
a synchronize and track circuit to generate a bias current based on a reference voltage;
an amplifier to generate an error current based on the output voltage and the reference voltage;
an oscillator to oscillate at a switching frequency based on the bias current and the error current;
at least one latch to generate at least first and second control signals based on a reset signal and the switching frequency;
a pulse shuffler to generate at least first and second shuffled control signals based on the first and second control signals, so as to prevent consecutive pulses from occurring in the first shuffled control signal without an intermediary pulse in the second shuffled control signal; and
a pulse selector to: in a first mode, provide the first and second shuffled control signals to the first and second transistors respectively; and, in a second mode, provide the first and second control signals to the first and second transistors respectively.

2. The DC-DC voltage converter of claim 1 , further comprising a multiplexer to select between: a first input signal for output as the reset signal, the first input signal being generated by a constant on-time generator based on the switching frequency; and a second input signal for output as the reset signal, the second input signal being generated based on the switching frequency and a current of the inductor.

3. The DC-DC voltage converter of claim 2 , wherein the constant on-time generator, when operated at the switching frequency, limits an inrush current of the inductor.

4. The DC-DC voltage converter of claim 1 , further comprising a multiplexer to select between: a first input signal for output as the reset signal, the first input signal being generated based on the switching frequency; and a second input signal for output as the reset signal, the second input signal being generated by a pulse width modulation current loop based on the switching frequency and a current of the inductor.

5. The DC-DC voltage converter of claim 4 , wherein the pulse width modulation current loop includes a ramp generator and a comparator, the comparator to output the second input signal based on a comparison of the error current and the ramp generator.

6. The DC-DC voltage converter of claim 5 , wherein the ramp generator operates based on the switching frequency.

7. The DC-DC voltage converter of claim 1 , further comprising:
a multiplexer to select between: a first input signal for output as the reset signal, the first input signal being generated based on the switching frequency; and a second input signal for output as the reset signal, the second input signal being generated based on the switching frequency and a current of the inductor; and
a mode selector to control the selection performed by the multiplexer, wherein the multiplexer is to select: the first input signal for output as the reset signal when the output voltage is below a voltage threshold; and the second input signal for output as the reset signal when the output voltage is greater than or equal to the voltage threshold.

8. The DC-DC voltage converter of claim 1 , wherein the latch is an SR latch.

9. A circuit comprising:
an oscillator to generate a switching signal oscillating at a switching frequency based on an output voltage of an inductor and a reference voltage;
a constant on-time generator to generate a fixed-width pulse at the switching frequency;
at least one set-reset latch to be set using the switching signal and reset using the fixed-width pulse, the set-reset latch to generate at least first and second control signals;
a pulse shuffler to generate at least first and second shuffled control signals based on the first and second control signals, so as to prevent consecutive pulses from occurring in the first shuffled control signal without an intermediary pulse in the second shuffled control signal; and
a pulse selector to: in a first mode, provide the first shuffled control signal to a transistor to charge or discharge the inductor; and, in a second mode, provide the first control signal to the transistor to charge or discharge the inductor.

10. The circuit of claim 9 , wherein the transistor is a first transistor, and the circuit further includes a complement generator to generate a complement of the first control signal or the first shuffled control signal, wherein:
in the first mode, the first transistor is to source voltage to the inductor when the first shuffled control signal represents a particular logical state, and a second transistor is to sink voltage from the inductor when the complement of the first shuffled control signal represents the particular logical state; and
in the second mode, the first transistor is to source voltage to the inductor when the first control signal represents the particular logical state, and the second transistor is to sink voltage from the inductor when the complement of the first control signal represents the particular logical state.

11. The circuit of claim 9 , wherein the reference voltage is to increase over time.

12. A DC-DC voltage converter comprising:
a mode selector to determine whether to operate in a first mode or a second mode;
a pulse shuffler to modify a first control signal received from a first latch and a second control signal received from a second latch to create a first shuffled control signal and a second shuffled control signal, the modifying to prevent consecutive pulses from occurring in the first shuffled control signal without an intermediary pulse in the second shuffled control signal; and
a pulse selector to access a mode selection signal from the mode selector, the pulse selector to, when in the first mode, provide the first shuffled control signal to a transistor, the pulse selector to, when in the second mode, provide the first control signal to the transistor.

13. The DC-DC voltage converter of claim 12 , wherein the mode selector is to determine whether to operate in the first mode or the second mode based on a comparison of an output voltage to a voltage threshold.

14. The DC-DC voltage converter of claim 12 , further including a tracking circuit to provide a bias current to an oscillator, the oscillator to provide a clock signal to a current control loop.

15. The DC-DC voltage converter of claim 14 , wherein the bias current is based on a reference voltage.

16. The DC-DC voltage converter of claim 12 , wherein the transistor is a first transistor, and the pulse selector is further to, when in the first mode, provide the second shuffled control signal to a second transistor, and, when in the second mode, provide the second control signal to the second transistor.

Assignees

• Texas Instruments Inc

Inventors

• Assaad Rida Shawky
• Evans David Wayne

Classifications

• H02M1/36 Primary

  Means for starting or stopping converters · CPC title

• H03K5/00006

  Changing the frequency (modulating pulses H03K7/00; frequency dividers H03K21/00 - H03K29/00; additive or subtractive mixing of two pulse rates into one G06F7/605; pulse rate dividers G06F7/68) · CPC title

• H02M3/156

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H03K4/06

  having triangular shape · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title