Method of manufacturing semiconductor device having semiconductor chip mounted on lead frame

Patent metadata

Field	Value
Publication number	US-10043721-B2
Application number	US-201715495058-A
Country	US
Kind code	B2
Filing date	Apr 24, 2017
Priority date	Mar 19, 2014
Publication date	Aug 7, 2018
Grant date	Aug 7, 2018

Abstract

In the manufacture of a semiconductor device using a lead frame, in which an outer lead is electrically connected to an inner lead suspension lead via an inner lead, an encapsulating resin is formed over the inner lead, part of the outer lead, and part of the inner lead suspension lead. The parts of the outer lead and the inner lead suspension lead that protrude from the resin are cut, and a plated film is formed on the portion of the cut outer lead that protrudes from the resin so that a solder layer is easily formed on all exposed surfaces of the outer lead. The inner lead suspension lead includes a narrowed portion that is smaller in cross-sectional area than other portions of the inner lead suspension lead, and an outline of the resin overlaps the narrowed portion of the inner lead suspension lead in plan view so as to suppress impact forces generated when the inner lead suspension lead is cut at the narrowed portion.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising:
preparing a lead frame comprising:
an island;
an inner lead disposed close to the island;
an inner lead suspension lead and an outer lead each connected to the inner lead; and
an island suspension lead connected to the island,
the inner lead suspension lead including a first narrowed portion that is smaller in cross-sectional area than other portions of the inner lead suspension lead;

die-bonding, wire-bonding, and resin encapsulating a semiconductor chip so that the first narrowed portion overlaps an outline of the encapsulating resin in plan view;
cutting a distal end of the outer lead;
forming, by electrolytic plating, a plated film on the cut surface of the outer lead;
cutting the inner lead suspension lead at the first narrowed portion; and
cutting the island suspension lead.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising testing electrical characteristics of the semiconductor chip between the cutting of the inner lead suspension lead and the cutting of the island suspension lead.

3. A method of manufacturing a semiconductor device, comprising:
preparing a lead frame that includes an island, an inner lead spaced from the island, an inner lead suspension lead connected to the inner lead and having a narrowed portion that is smaller in cross-sectional area than other portions of the inner lead suspension lead, and an outer lead connected to the inner lead;
die-bonding a semiconductor chip to the island;
wire-bonding the inner lead to the semiconductor chip;
resin encapsulting the semiconductor chip, the island, the inner lead, the wire, the outer lead and the inner lead suspension lead so that part of the outer lead and part of the inner lead suspension lead protrude from the resin and an outline of the resin overlaps the narrowed portion of the inner lead suspension lead in plan view;
cutting the outer lead at the part that protrudes from the resin;
plating a plated film on all surface portions of the cut outer lead that protrude from the resin; and
cutting the inner lead suspension lead at the part of the narrowed portion that protrudes from the resin.

4. The method of manufacturing a semicondcutor device according to claim 3 ; wherein the cutting of the inner lead suspension lead is carried out after plating the plated film on the cut outer lead.

5. The method of manufacturing a semiconductor device according to claim 3 ; wherein
the preparing a lead frame includes preparing the lead frame that includes an island suspension lead connected to the island, and
the resin encapsulating includes resin encapsulating the island suspension lead so that part of the island suspension lead protrudes from the resin; and further comprising:
cutting the island suspension lead that protrudes from the resin; and
testing electrical characteristics of the semiconductor chip between the cutting of the inner lead suspension lead and the cutting of the island suspension lead.

Assignees

• Sii Semiconductor Corp
• Seiko Instr Inc

Inventors

• Taguchi Yasuhiro

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title