Processing commands in a directory-based computer memory management system

Patent metadata

Field	Value
Publication number	US-10042764-B2
Application number	US-201615193390-A
Country	US
Kind code	B2
Filing date	Jun 27, 2016
Priority date	Jun 27, 2016
Publication date	Aug 7, 2018
Grant date	Aug 7, 2018

Abstract

A method for processing commands in a directory-based computer memory management system includes receiving a command to perform an operation on data stored in a set of one or more computer memory locations associated with an entry in a directory of a computer memory, the entry is associated with an indicator for indicating whether the set of one or more computer memory locations is busy, a head tag, and a tail tag. The command is associated with a command tag and a predecessor tag, and checking the indicator to determine whether the set of one or more computer memory locations is busy.

First claim

What is claimed is:

1. A method for processing commands in a directory-based computer memory management system, the method comprising:
receiving a command to perform an operation on data stored in a set of one or more computer memory locations,
wherein the set of one or more computer memory locations is associated with an entry in a directory of a computer memory,
wherein the entry is associated with
an indicator for indicating whether the set of one or more computer memory locations is busy,
a head tag, and
a tail tag, and

wherein the command is associated with
a command tag and
a predecessor tag;

searching the directory to determine whether the entry exist in the directory;
based on the entry not existing in the directory, creating an entry corresponding to the set of one or more computer memory locations, wherein data from the set of one or more computer memory locations is required for processing the command;
checking the indicator to determine whether the set of one or more computer memory locations is busy; and
based on the set of one or more computer memory locations being busy and the head tag being not equal to the predecessor tag, rejecting the command.

2. The method of claim 1 , further comprising:
setting both the head tag and the tail tag equal to the command tag, in response to the indicator indicating that the set of one or more computer memory locations is not busy, and the command being the only command pending that involves the set of one or more computer memory locations;
setting the indicator to indicate that the set of one or more computer memory locations is busy;
accepting the command, wherein accepting the command comprises allowing the operation to be performed; and
setting the indicator, upon completion of the operation, to indicate that the set of one or more computer memory locations is not busy.

3. The method of claim 1 , further comprising:
setting the predecessor tag equal to the tail tag, in response to the indicator indicating that the set of one or more computer memory locations is busy, and the command is not rejected;
setting the tail tag equal to the command tag; and
rejecting the command.

4. The method of claim 1 , further comprising:
setting the head tag equal to the command tag, in response to the indicator indicating that the set of one or more computer memory locations is not busy, and the head tag matching the predecessor tag;
setting the indicator to indicate that the set of one or more computer memory locations is busy;
accepting the command, wherein accepting the command comprises allowing the operation to be performed; and
setting the indicator, upon completion of the operation, to indicate that the set of one or more computer memory locations is not busy.

5. The method of claim 1 further comprising:
rejecting the command, in response to the indicator indicating that the set of one or more computer memory locations is busy and the command has been previously rejected.

6. The method of claim 1 , further comprising:
rejecting the command in response to the indicator indicating that the set of one or more computer memory locations is not busy and the head tag being not equal to the predecessor tag.

7. The method of claim 1 wherein the computer memory is a cache memory and the entry is a cache line entry.

8. A system for processing commands in a directory-based computer memory management system, the system comprising:
a memory device;
an output device; and
a processing unit in communications with the memory device and the output device, wherein the system is configured to perform a method comprising:
receiving a command to perform an operation on data stored in a set of one or more computer memory locations,
wherein the set of one or more computer memory locations is associated with an entry in a directory of a computer memory,
wherein the entry is associated with
an indicator for indicating whether the set of one or more computer memory locations is busy,
a head tag, and
a tail tag, and

wherein the command is associated with
a command tag and
a predecessor tag;

searching the directory to determine whether the entry exist in the directory;
based on the entry not existing in the directory, creating an entry corresponding to the set of one or more computer memory locations, wherein data from the set of one or more computer memory locations is required for processing the command;
checking the indicator to determine whether the set of one or more computer memory locations is busy; and
based on the set of one or more computer memory locations being busy and the head tag being not equal to the predecessor tag, rejecting the command.

9. The system of claim 8 , further comprising:
setting both the head tag and the tail tag equal to the command tag, in response to the indicator indicating that the set of one or more computer memory locations is not busy, and the command being the only command pending that involves the set of one or more computer memory locations;
setting the indicator to indicate that the set of one or more computer memory locations is busy;
accepting the command, wherein accepting the command comprises allowing the operation to be performed; and
setting the indicator, upon completion of the operation, to indicate that the set of one or more computer memory locations is not busy.

10. The system of claim 8 , further comprising:
setting the predecessor tag equal to the tail tag, in response to the indicator indicating that the set of one or more computer memory locations is busy, and the command is not rejected;
setting the tail tag equal to the command tag; and
rejecting the command.

11. The system of claim 8 , further comprising:
setting the head tag equal to the command tag, in response to the indicator indicating that the set of one or more computer memory locations is not busy, and the head tag matching the predecessor tag;
setting the indicator to indicate that the set of one or more computer memory locations is busy;
accepting the command, wherein accepting the command comprises allowing the operation to be performed; and
setting the indicator, upon completion of the operation, to indicate that the set of one or more computer memory locations is not busy.

12. The system of claim 8 , further comprising:
rejecting the command, in response to the indicator indicating that the set of one or more computer memory locations is busy and the command has been previously rejected.

13. The system of claim 8 , further comprising:
rejecting the command in response to the indicator indicating that the set of one or more computer memory locations is not busy and the head tag being not equal to the predecessor tag.

14. The system of claim 8 , wherein the computer memory is a cache memory and the entry is a cache line entry.

15. A computer program product for processing commands in a directory-based computer memory management system, the computer program product comprising:
a non-transitory, computer-readable storage medium; and computer-readable program code embodied in the storage medium, wherein the computer-readable program code is capable of performing a method comprising:
receiving a command to perform an operation on data stored in a set of one or more computer memory locations,
wherein the set of one or more computer memory locations is associated with an entry in a directory of a computer memory,
wherein the entry is associated with
an indicator for indicating whether the set of one or more computer memory locations is busy,
a head tag, and
a tail tag, and

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Assignees

• IBM

Inventors

• Bar-Joshua Michael
• Benjamini Yiftach
• Gendel Yaakov
• Gonen Eyal
• Mesh Alexander

Classifications

• G06F12/0842

  for multiprocessing or multitasking · CPC title

• G06F12/0828 Primary

  with concurrent directory accessing, i.e. handling multiple concurrent coherency transactions · CPC title

• G06F2212/1016

  Performance improvement · CPC title

• G06F2212/60

  Details of cache memory · CPC title

• G06F12/0824

  Distributed directories, e.g. linked lists of caches · CPC title