Vehicle electronic control apparatus

Patent metadata

Field	Value
Publication number	US-10040440-B2
Application number	US-201514840352-A
Country	US
Kind code	B2
Filing date	Aug 31, 2015
Priority date	Jun 1, 2015
Publication date	Aug 7, 2018
Grant date	Aug 7, 2018

Abstract

A first monitoring control circuit unit monitors controlling operation of an engine control unit (ECU); when the occurrence frequency of an abnormality becomes the same as or larger than a predetermined threshold value, a first storage circuit stores that occurrence frequency and a first cutoff circuit de-energizes an intake valve opening degree control motor for an air-intake throttle so as to set the intake valve opening degree to a fixed intake valve opening degree; a second monitoring control means monitors controlling operation of a transmission control unit (TCU); when the occurrence frequency of an abnormality becomes the same as or larger than a predetermined threshold value, a second storage circuit stores that occurrence frequency and a second cutoff circuit de-energizes a gear-shifting electromagnet valve so as to set the transmission ratio to a fixed transmission ratio.

First claim

What is claimed is:

1. A vehicle electronic control apparatus in which a first central processing unit (CPU) and a second CPU that are microprocessors provided in an engine control circuit unit and a transmission control circuit unit, respectively, collaborate with each other and in which the first CPU and the second CPU are mounted on a common circuit board and are contained in a common case or the first CPU and the second CPU are separately mounted on a first circuit board contained in a first case and on a second circuit board contained in a second case, respectively,
wherein a first monitoring control circuit unit including at least a first watchdog timer is connected with the first CPU;
wherein the first CPU operates with opening/closing signals or analogue signals, as input signals, to be obtained from a first input-sensor group dedicated to engine control and a third input-sensor group utilized commonly in the engine control and transmission control, and generates at least a fuel injection control output for a fuel-injection electromagnetic valve and a valve-opening control output for an intake valve opening degree control motor for an intake valve provided in an intake throttle;
wherein a valve-opening drive mechanism of the intake valve includes an initial-position returning mechanism that performs a saving operation based on a fixed intake valve opening degree when power supply to the intake valve opening degree control motor is stopped;
wherein the operation of the second CPU is monitored by a runaway monitoring means included in a second monitoring control means or a second watchdog timer included in a second monitoring control circuit unit, and the runaway monitoring means is a means in which the first CPU monitors a watchdog signal to be generated by the second CPU;
wherein a transmission to be controlled by the second CPU includes a transmission ratio fixation mechanism that controls to travel at least forward at a fixed transmission ratio suitable for middle- or high-speed driving when the second CPU stops its operation;
wherein the first watchdog timer measures an ON-time width and an OFF-time width of a first pulse train signal generated by the first CPU, and generates a first reset signal so as to initialize and restart the first CPU, when the ON-time width becomes greater than or equal to the first threshold-value time;
wherein the first monitoring control circuit unit is provided with a first control abnormality determination circuit including a communication abnormality determination circuit and a question-answer abnormality determination circuit, a mode selection first circuit, and a first gate circuit;
wherein the first control abnormality determination circuit includes a first correct answer information data memory to sequentially transmit a plurality of first questions related to at least a valve-opening control output creation program to the first CPU in a driving operation, receive, from the first CPU, first answer information corresponding to the plurality of first questions, compare the first answer information with correct first answer information preliminarily stored in the first monitoring control circuit unit, determine whether a first control abnormality including a communication abnormality or a question-answer abnormality exists in response to a code check abnormality or an answering-response delay existing in the first answer information, and create a first control abnormality signal in response to determining that the first control abnormality exists;
wherein the first monitoring control circuit unit comprises a first region determination circuit, and the first region determination circuit determines whether the first control abnormality signal is generated from a region other than a fuel injection control region of a first memory connected to the first CPU, generates a continuity first reset signal to reset the first CPU through a logic sum circuit in response to the first control abnormality signal being generated from the fuel injection control region, and transmits a selection first reset signal to the first gate circuit in response to the first control abnormality signal being generated from the region other than the fuel injection control region;
wherein the mode selection first circuit includes a first storage circuit that stores a first state when a number of times or a frequency that each of the first reset signal and the first control abnormality signal becomes greater than or equal to a predetermined threshold value, a first cutoff circuit that stops power supply to the intake valve opening degree control motor when the first storage circuit stores the first state, and a reset circuit that preliminarily initializes the first storage circuit when a power switch for starting power supply to the first CPU is closed; and
wherein in response to the first state being stored in the first storage circuit, the first storage circuit activates the first gate circuit that receives the selection first reset signal to prohibit the first control abnormality signal, which is generated from the region other than the fuel injection control region, from resetting the first CPU.

2. The vehicle electronic control apparatus according to claim 1 ,
wherein the second CPU operates with opening/closing signals or analogue signals, as input signals, to be obtained from the second input-sensor group dedicated to the transmission control and the third input-sensor group utilized commonly in the engine control and the transmission control, and generates a selection control output for a back-and-forth selection electromagnetic valve that responds to a selection position of a shift lever and a transmission control output for a gear-shifting electromagnet valve that determines a no-step or at least multistep transmission ratio;
wherein the transmission includes the transmission ratio fixation mechanism that sets the transmission ratio to the fixed transmission ratio for the middle- or high-speed driving with the middle transmission ratio or higher when power supply to the gear-shifting electromagnet valve is stopped and that sets the transmission ratio to the fixed transmission ratio for fixed forward driving when the operation of the second CPU is stopped;
wherein the runway monitoring means implemented by the first CPU or the second watchdog timer measures an ON-time width and an OFF-time width of a second pulse train signal generated by the second CPU, and generates a second reset signal so as to initialize and restart the second CPU, when the ON-time width becomes greater than or equal to a second threshold-value time;
wherein there is provided a second monitoring control means having a second control abnormality determination means including a communication abnormality determination means and a question-answer abnormality determination means, a mode selection second circuit, and a second gate means or there is provided a second monitoring control circuit unit having a second control abnormality determination circuit including a communication abnormality determination circuit and a question-answer abnormality determination circuit, a mode selection second circuit, and a second gate means;
wherein each of the second control abnormality determination means and the second control abnormality determination circuit is provided with a second correct answer information data memory corresponding to transmission question data, sequentially transmits a plurality of second questions related to at least a transmission control output creation program to the second CPU in driving operation, receives, from the second CPU, second answer information corresponding to the plurality of second questions, and then compares the second answer information with second correct answer information preliminarily stored in the first memory or the second monitoring control circuit unit that co

Assignees

• Mitsubishi Electric Corp

Inventors

• Iwagami Yuki
• Hashimoto Koji

Classifications

• B60W2050/0006

  Digital architecture hierarchy · CPC title

• B60W50/032

  Fixing failures by repairing failed parts, e.g. loosening a sticking valve · CPC title

• B60W10/10 Primary

  including control of change-speed gearings · CPC title

• G05B19/0421 Primary

  Multiprocessor system · CPC title

• B60W10/06

  including control of combustion engines · CPC title