Nanowire sized opto-electronic structure and method for modifying selected portions of same

US10038115B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10038115-B2
Application numberUS-201715634583-A
CountryUS
Kind codeB2
Filing dateJun 27, 2017
Priority dateOct 26, 2012
Publication dateJul 31, 2018
Grant dateJul 31, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of making a LED structure comprising: forming a nanowire core on a support, wherein the nanowire core comprises a tip and a sidewall, wherein the sidewall comprises a m-plane and the tip comprises a p-plane; depositing an InGaN light emitting layer on the nanowire core by MOCVD using a carrier gas that does not contain Hz; and depositing a GaN layer on the InGaN light emitting layer by MOCVD using a carrier gas that comprises H 2 . 2. The method of claim 1 , wherein the nanowire comprises a multilayer structure and the GaN layer of the nanowires comprises a GaN barrier layer which is formed using a carrier gas that comprises the H 2 and an inert MOCVD carrier gas. 3. The method of claim 2 , wherein the H 2 in the carrier gas is provided at 500 sccm or less. 4. The method of claim 2 , wherein the InGaN light emitting layer is etched on the p-plane of the nanowire core during deposition of the GaN barrier layer by the MOCVD using the carrier gas that comprises H 2 . 5. The method of claim 2 , wherein deposition of the GaN barrier layer by the MOCVD using the carrier gas that comprises H 2 reduces a growth rate of the InGaN light emitting layer on the p-plane of the nanowire core without reducing the growth rate of the InGaN light emitting layer on the m-plane of the nanowire core. 6. The method of claim 1 , wherein the nanowire core comprises a GaN core, and the InGaN light emitting layer is selectively deposited on the m-plane of the GaN core but not on the p-plane of the GaN core. 7. The method of claim 6 , wherein the InGaN light emitting layer comprises a first shell located around the GaN core, and the GaN barrier layer comprises a second shell located around the first shell. 8. The method of claim 1 , wherein a conductivity of the tip is reduced by at least one order of magnitude by using the carrier gas that comprises H 2 compared to the conductivity of the tip deposited without using the carrier gas that comprises H 2 . 9. The method of claim 1 , wherein depositing the GaN layer on the InGaN light emitting layer by the MOCVD using the carrier gas that comprises H 2 reduces or eliminates a conductivity of the tip of the nanowire compared to the conductivity of the sidewalls.

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What does patent US10038115B2 cover?
A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.
Who is the assignee on this patent?
Glo Ab
What technology area does this patent fall under?
Primary CPC classification H01L33/0075. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 31 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).