Power handling in a scalable storage system

Patent metadata

Field	Value
Publication number	US-10037296-B2
Application number	US-201715616597-A
Country	US
Kind code	B2
Filing date	Jun 7, 2017
Priority date	Apr 25, 2014
Publication date	Jul 31, 2018
Grant date	Jul 31, 2018

Abstract

Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage assembly is provided. The data storage assembly includes a plurality of storage drives each comprising a PCIe host interface and solid state storage media, with each of the storage drives configured to store and retrieve data responsive to storage operations received over an associated PCIe host interface. The data storage assembly includes a PCIe switch circuit coupled to the PCIe host interfaces of the storage drives and configured to receive the storage operations issued by a plurality of host systems over a shared PCIe interface and transfer the storage operations for delivery to the storage drives over selected ones of the PCIe host interfaces. The data storage assembly includes holdup circuitry configured to provide power to at least the storage drives after input power is lost to the data storage assembly.

First claim

What is claimed is:

1. A data storage assembly, comprising:
a plurality of storage drives each comprising a Peripheral Component Interconnect Express (PCIe) host interface, solid state storage media, and holdup power storage elements, with each of the plurality of storage drives configured to store and retrieve data responsive to storage operations received over the associated PCIe host interface;
a PCIe switch circuit coupled to the PCIe host interfaces of the plurality of storage drives and configured to receive the storage operations issued by a plurality of host systems over a shared PCIe interface and transfer the storage operations for delivery to the plurality of storage drives over selected ones of the PCIe host interfaces; and
power control circuitry configured to redistribute holdup power of the holdup power storage elements among ones the plurality of storage drives, the PCIe switch circuit, and the plurality of host systems after input power is lost to the data storage assembly.

2. The data storage assembly of claim 1 , further comprising:
controller circuitry configured to receive power from the holdup power storage elements after the input power is lost; and
the controller circuitry configured to identify when the input power is lost and instruct the power control circuitry to redistribute the power among at least the plurality of storage drives.

3. The data storage assembly of claim 2 , comprising:
the controller circuitry configured to monitor the plurality of storage drives to determine a state of at least write operations among the storage operations and selectively power down ones of the plurality of storage drives according to completion of associated write operations for the ones of the plurality of storage drives.

4. The data storage assembly of claim 3 , comprising:
the controller circuitry configured to determine when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively direct the excess holdup power over a mating circuit board connector for use by at least one other data storage assembly.

5. The data storage assembly of claim 3 , comprising:
the controller circuitry configured to determine when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively bleed the excess holdup power into a load circuit of the data storage assembly.

6. The data storage assembly of claim 3 , comprising:
the controller circuitry configured to determine if the input power is lost due to removal of the data storage assembly from a mating circuit board connector;
when the input power is lost due to removal of the data storage assembly, then the controller circuitry configured to determine when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively bleed the excess holdup power into a load circuit of the data storage assembly;
when the input power is lost without removal of the data storage assembly, then the controller circuitry configured to determine when the excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively direct the excess holdup power over the mating circuit board connector for use by at least one other data storage assembly.

7. The data storage assembly of claim 1 , comprising:
the power control circuitry configured to receive management instructions received over a mating circuit board connector to redistribute the holdup power over the mating circuit board connector among the ones the plurality of storage drives, the PCIe switch circuit, and the plurality of host systems when the input power is lost.

8. A method of operating a data storage assembly, the method comprising:
storing and retrieving data responsive to storage operations received over associated PCIe host interfaces in a plurality of storage drives each comprising a Peripheral Component Interconnect Express (PCIe) host interface solid state storage media, and holdup power storage elements;
in a PCIe switch circuit coupled to the PCIe host interfaces of the plurality of storage drives, receiving the storage operations issued by a plurality of host systems over a shared PCIe interface and transferring the storage operations for delivery to the plurality of storage drives over selected ones of the PCIe host interfaces;
in power control circuitry, redistributing holdup power of the holdup power storage elements among ones the plurality of storage drives, the PCIe switch circuit, and the plurality of host systems after input power is lost to the data storage assembly.

9. The method of claim 8 , further comprising:
receiving power from the holdup power storage elements after the input power is lost, and identifying when the input power is lost and instructing the holdup power storage elements to redistribute the power among at least the plurality of storage drives.

10. The method of claim 9 , further comprising:
monitoring the plurality of storage drives to determine a state of at least write operations among the storage operations and selectively powering down ones of the plurality of storage drives according to completion of associated write operations for the ones of the plurality of storage drives.

11. The method of claim 10 , further comprising:
determining when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively directing the excess holdup power over a mating circuit board connector for use by at least one other data storage assembly.

12. The method of claim 10 , further comprising:
determining when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively bleeding the excess holdup power into a load circuit of the data storage assembly.

13. The method of claim 10 , further comprising:
determining if the input power is lost due to removal of the data storage assembly from a mating circuit board connector;
when the input power is lost due to removal of the data storage assembly, then determining when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively bleeding the excess holdup power into a load circuit of the data storage assembly;
when the input power is lost without removal of the data storage assembly, then determining when excess holdup power remains in the holdup power storage elements after completion of the associated write operations for the ones of the plurality of storage drives, and responsively directing the excess holdup power over the mating circuit board connector for use by at least one other data storage assembly.

14. The method of claim 8 , further comprising:
in a control processor, receiving management instructions transferred over a mating circuit board connector to redistribute the holdup power over the mating circuit board connector when the input power is lost.

15. A data storage module, comprising:
a plurality of storage drives each comprising holdup power storage elements and configured to store and retrieve

Assignees

• Liqid Inc

Inventors

• Breakstone Jason
• Long Christopher

Classifications

• G06F3/0658

  Controller construction arrangements · CPC title

• G06F3/0689

  Disk arrays, e.g. RAID, JBOD · CPC title

• G06F11/00

  Error detection; Error correction; Monitoring (error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00) · CPC title

• G06F13/4221

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title

• G06F13/4022 Primary

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title