Multi-standard, multi-channel expandable TV/satellite receiver

US10033421B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10033421-B2
Application numberUS-201615168318-A
CountryUS
Kind codeB2
Filing dateMay 31, 2016
Priority dateMay 31, 2016
Publication dateJul 24, 2018
Grant dateJul 24, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a semiconductor die including: a first tuner to receive and tune a terrestrial radio frequency (RF) signal, the first tuner including a first frequency synthesizer including a first voltage controlled oscillator (VCO) to generate a first VCO signal at a first frequency, and a first mixer to downconvert the terrestrial RF signal to a terrestrial baseband signal using the first VCO signal; a second tuner to receive and tune a satellite RF signal, the second tuner including a second frequency synthesizer including a second VCO to generate a second VCO signal at a second frequency, and a second mixer to downconvert the satellite RF signal to a satellite baseband signal using the second VCO signal; a digitizer coupled to the first and second tuners to digitize the terrestrial baseband signal and the satellite baseband signal; a digital signal processor (DSP) to further process the terrestrial baseband signal and the satellite baseband signal; a first demodulator to demodulate the terrestrial baseband signal and output a demodulated terrestrial signal; a second demodulator to demodulate the satellite baseband signal and output a demodulated satellite signal; and a bypass path to bypass the first and second demodulators and to provide at least one the terrestrial baseband signal and the satellite baseband signal from the DSP to an output pad of the semiconductor die. 2. The apparatus of claim 1 , further comprising a third demodulator to demodulate a baseband frequency modulated (FM) signal, the baseband FM signal generated by the first tuner. 3. The apparatus of claim 1 , wherein the first tuner comprises: a first low noise amplifier (LNA) to receive and amplify the terrestrial RF signal; and a second LNA to receive and amplify a second terrestrial RF signal. 4. The apparatus of claim 3 , further comprising an active splitter to receive the second terrestrial RF signal and provide the second terrestrial RF signal to the second LNA and to at least one buffer to output the second terrestrial RF signal from the semiconductor die. 5. The apparatus of claim 4 , wherein the at least one buffer comprises a first buffer and a second buffer, wherein the second buffer comprises a loop through buffer to output the second terrestrial RF signal to a second semiconductor die coupled to the semiconductor die. 6. The apparatus of claim 3 , further comprising a configurable LNA, wherein the configurable LNA is controllable to be the first LNA in a first mode of operation and to be the second LNA in a second mode of operation. 7. The apparatus of claim 6 , wherein the first LNA comprises a common gate amplifier and the second LNA comprises a common source amplifier. 8. The apparatus of claim 6 , wherein the configurable LNA includes a plurality of slices, each of the plurality of slices individually controllable to provide an output to one of a plurality of filters coupled to the first mixer or to a dump node. 9. The apparatus of claim 8 , wherein a first slice comprises: a first amplifier pair controllable to operate in a selected one of a common gate mode and a common source mode; a plurality of cascode pairs, wherein one of the plurality of cascode pairs is to be coupled to the first amplifier pair to direct an amplified output of the first amplifier pair to a selected destination corresponding to one of the plurality of filters or the dump node; and at least second and third amplifier pairs controllable to operate in the common gate mode. 10. The apparatus of claim 1 , wherein the second tuner comprises: a first low noise amplifier (LNA) to receive and amplify the satellite RF signal; and a second LNA to receive and amplify a second satellite RF signal. 11. The apparatus of claim 10 , further comprising a microcontroller, wherein in a first mode the microcontroller is to cause the satellite RF signal to couple to the first and second LNAs. 12. The apparatus of claim 1 , wherein the first frequency synthesizer comprises a first plurality of interpolative dividers to receive the first VCO signal and generate a plurality of local oscillator (LO) clock signals including a first LO clock signal therefrom, and the second frequency synthesizer comprises a plurality of integer dividers to receive the second VCO signal and generate a second LO clock signal therefrom, the first mixer to receive the first LO clock signal and the second mixer to receive the second LO clock signal. 13. The apparatus of claim 1 , wherein the apparatus comprises an integrated circuit (IC) comprising: the semiconductor die; and a second semiconductor die stacked above the semiconductor die without shielding therebetween, the second semiconductor die including a third tuner, a fourth tuner, and a second DSP and at least one demodulator. 14. An apparatus comprising: a first semiconductor die including: a first terrestrial tuner to receive and tune a terrestrial radio frequency (RF) signal, the first terrestrial tuner including a first frequency synthesizer including a first voltage controlled oscillator (VCO) to generate a first VCO signal at a first frequency, and a first mixer to downconvert the terrestrial RF signal to a terrestrial baseband signal using the first VCO signal; a first satellite tuner to receive and tune a selected one of a satellite RF signal and a second satellite RF signal, the first satellite tuner including a second frequency synthesizer including a second VCO to generate a second VCO signal at a second frequency, and a second mixer to downconvert a selected one of the satellite RF signal and the second satellite RF signal to a satellite baseband signal using the second VCO signal; a digitizer coupled to the first terrestrial tuner and the first satellite tuner to digitize the terrestrial baseband signal and the satellite baseband signal; a digital signal processor (DSP) to further process the terrestrial baseband signal and the satellite baseband signal; a first analog demodulator to demodulate the terrestrial baseband signal and output a first demodulated terrestrial signal; and a first digital demodulator to demodulate the terrestrial baseband signal and output a second demodulated terrestrial signal, when the terrestrial baseband signal comprises a digital modulated signal, and to demodulate the satellite baseband signal and output a first demodulated satellite signal; and a second semiconductor die stacked above the first semiconductor die, the second semiconductor die including: a second terrestrial tuner to receive and tune the terrestrial RF signal, wherein the second terrestrial tuner is to receive the terrestrial RF signal from the first terrestrial tuner of the first semiconductor die; a second satellite tuner to receive and tune a selected one of the satellite RF signal and the second satellite RF signal; a second digitizer coupled to the second terrestrial tuner and the second satellite tuner to digitize a terrestrial baseband signal and a satellite baseband signal; and a second DSP to further process the terrestrial baseband signal and the satellite baseband signal. 15. The apparatus of claim 14 , further comprising a controller to cause the first terrestrial tuner to receive and tune to a first channel within the terrestrial RF signal and concurrently cause the second terrestrial tuner to receive and tune to a second channel within the terrestrial RF signal. 16. The apparatus of claim 15 , wherein the controller is to cause a first amplifier of the first satellite tuner to be enabled to receive and amplify the satellite RF signal

Assignees

Inventors

Classifications

  • H04B1/30Primary

    for homodyne or synchrodyne receivers (demodulator circuits H03D1/22) · CPC title

  • assessing signal quality or detecting noise/interference for the received signal · CPC title

  • involving specific tuning arrangements, e.g. two tuners · CPC title

  • wherein the AD/DA conversion occurs at baseband stage · CPC title

  • H04B1/005Primary

    adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges · CPC title

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Frequently asked questions

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What does patent US10033421B2 cover?
In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These …
Who is the assignee on this patent?
Silicon Lab Inc
What technology area does this patent fall under?
Primary CPC classification H04B1/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).