Switching loss correction circuitry and method

Patent metadata

Field	Value
Publication number	US-10033272-B2
Application number	US-201514817887-A
Country	US
Kind code	B2
Filing date	Aug 4, 2015
Priority date	Mar 12, 2015
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

A circuit that stores characterized loss information for a buck converter and uses the characterized loss information instead of measurements involving output power dependent losses. The characterized loss information may include the characterized switching loss, the characterized ripple loss, etc. The circuit may then calculate the output power, efficiency, power dissipation, etc. without needing to measure the output current.

First claim

What is claimed is:

1. An electronic device, comprising:
a switching power converter that receives an input power, and that generates an output power according to a duty cycle of the switching power converter, wherein the switching power converter has a switching frequency for a power switch transistor;
a switching loss estimator circuit configured to charge a capacitance of a replica power switch transistor to provide a switching loss estimate for the power switch transistor, wherein the capacitance of the replica power switch transistor equals a ratio of a capacitance for the power switch transistor;
an input voltage sensor that measures an input voltage of the switching power converter;
an output voltage sensor that measures an output voltage of the switching power converter;
a current sensor that measures an input current of the switching power converter; and
a processor configured to calculate an output current for the switching power converter based upon the duty cycle, the input current, and the switching loss estimate,
wherein the processor is further configured to determine the input power from the input voltage and input current and to determine the output power from the output voltage and the output current.

2. The electronic device of claim 1 , wherein the processor adjusts, in response to the switching loss estimate, a power consumption of a load that receives the output power.

3. The electronic device of claim 1 , wherein the switching power converter comprises a buck converter.

4. The electronic device of claim 1 , wherein the switching loss estimator circuit comprises: a current source configured to generate a test current responsive to a control signal to charge the capacitance of the replica power switch transistor; and a comparator configured to control a switch to discharge the replica power switch transistor responsive to a comparison of a voltage across the replica power switch transistor and a reference voltage.

5. The electronic device of claim 1 , further comprising: a ripple loss circuit configured to provide a ripple loss estimate for the switching power converter, wherein the processor is further configured to calculate the output current for the switching power converter based upon the duty cycle, the input current, the switching loss estimate, and the ripple loss estimate.

6. An electronic device, comprising:
a buck converter that receives an input power, and that generates an output power according to a duty cycle of the buck converter, wherein the buck converter has a switching frequency;
a memory that stores information of a characterized switching loss of the buck converter; and
a processor that calculates an estimated switching loss of the buck converter according to the information of the characterized switching loss, an input voltage of the buck converter, and the switching frequency of the buck converter;
a programmable current source, coupled to the input node and to a test node, that generates a test current in response to a control signal, wherein adjusting the control signal adjusts the test current;
a voltage comparator, coupled to the test node, that outputs a switch control signal based on a comparison of a test voltage at the test node and a reference voltage;
a capacitor, coupled to the test node, wherein the capacitor is ratioed to the high side switch and the low side switch; and
a switch, coupled to the test node in parallel with the capacitor, that is controlled by the switch control signal,
wherein the control signal is adjusted until a capacitance of the capacitor corresponds to a switching frequency of the buck converter, the reference voltage and the test current, wherein the characterized switching loss corresponds to the capacitance.

7. A method of operating a buck converter, comprising:
estimating a switching loss for power switch transistors in the buck converter by charging a capacitance for replica power switch transistors, wherein the capacitance for the replica power switch transistors equals a ratio of a capacitance for the power switch transistors in the buck converter;
receiving, by the buck converter, an input power;
generating, by the buck converter, an output power according to a duty cycle of the buck converter, wherein the buck converter has a switching frequency;
measuring an input voltage of the buck converter;
measuring an output voltage of the buck converter;
measuring an input current of the buck converter;
in a processor, calculating an output current for the buck converter responsive to the input current, the estimated switching loss, and the duty cycle; and
in the processor, calculating the output power from the output current and the output voltage.

8. The method of claim 7 , further comprising:
calculating a ripple loss estimate for the buck converter, wherein calculating the output current for the buck converter is further responsive to the ripple loss estimate.

9. The method of claim 8 , further comprising:
adjusting, in response to the ripple loss, a power consumption of a load that receives the output power.

10. The method of claim 7 , further comprising:
adjusting, in response to the estimated switching loss, a power consumption of a load that receives the output power.

11. The method of claim 10 , further comprising:
calculating an efficiency of the buck converter according to the input voltage of the buck converter, the output voltage of the buck converter, the duty cycle of the buck converter, the estimated switching loss, and the input current of the buck converter,
wherein adjusting the power consumption comprises adjusting, in response to the efficiency, the power consumption.

12. The method of claim 10 , further comprising:
calculating a power dissipation of the buck converter according to the input voltage, the output voltage, the input current, the duty cycle, and the estimated switching loss,
wherein adjusting the power consumption comprises adjusting, in response to the power dissipation, the power consumption.

Assignees

• Qualcomm Inc

Inventors

• Rader William
• Deak Edward Robert

Classifications

• H02M3/1584

  with a plurality of power processing stages connected in parallel · CPC title

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H02M3/157

  with digital control · CPC title

• H02M2001/0054

  Electricity · mapped topic

• H02M2001/008

  Electricity · mapped topic