Mask, manufacturing method thereof and exposure system

Patent metadata

Field	Value
Publication number	US-10032881-B2
Application number	US-201615504936-A
Country	US
Kind code	B2
Filing date	Mar 25, 2016
Priority date	Sep 16, 2015
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

A mask, including a transparent substrate and mask patterns formed on a surface of the transparent substrate, wherein the mask patterns include a first area for forming film patterns in a display area and a second area for forming film patterns in a non-display area; both the first area and the second area are provided with a plurality of patterned sub-masks; a distribution density of the patterned sub-masks in the first area is less than a distribution density of the patterned sub-masks in the second area; each patterned sub-mask includes a first pattern for forming a source electrode of a transistor, a second pattern for forming a drain electrode of the transistor, and a slit interposed between the first pattern and the second pattern; and a width of the slit in the first area is greater than a width of the slit in the second area.

First claim

The invention claimed is:

1. A mask, comprising a transparent substrate and mask patterns formed on a surface of the transparent substrate, wherein
the mask patterns include a first area for forming film patterns in a display area and a second area for forming film patterns in a non-display area;
both the first area and the second area are provided with a plurality of patterned sub-masks; a distribution density of the patterned sub-masks in the first area is less than a distribution density of the patterned sub-masks in the second area;
each patterned sub-mask includes a first pattern for forming a source electrode of a transistor, a second pattern for forming a drain electrode of the transistor, and a slit interposed between the first pattern and the second pattern; and a width of the slit in the first area is greater than a width of the slit in the second area.

2. The mask according to claim 1 , wherein the width of the slit in the first area is L; the width of the slit in the second area is M; and M=L−L×X %, in which 0<X<100, and X is proportional to a difference between the distribution density of the patterned sub-masks in the second area and the distribution density of the patterned sub-masks in the first area.

3. The mask according to claim 2 , wherein both the first pattern and the second pattern are made from a light-shielding material; and a portion of the transparent substrate disposed at the bottom of the slit is exposed through the slit.

4. The mask according to claim 3 , wherein both the first pattern and the second pattern are made from the light-shielding material with low reflectivity.

5. The mask according to claim 1 , wherein each of the first area and the second area is further provided with a wiring pattern for forming a wiring.

6. The mask according to claim 5 , wherein the wiring pattern is arranged in a same layer with the first pattern and the second pattern and made from a material the same with the first pattern and the second pattern.

7. The mask according to claim 1 , wherein the first pattern and the second pattern in the mask patterns are disposed on a same surface of the transparent substrate.

8. An exposure system, comprising the mask according to claim 1 .

9. A method for manufacturing a mask, comprising:
providing a transparent substrate;
depositing a light-shielding layer on a surface of the transparent substrate; and
forming mask patterns on the transparent substrate by a patterning process,
wherein, the mask patterns include a first area for forming film patterns in a display area and a second area for forming film patterns in a non-display area;
both the first area and the second area are provided with a plurality of patterned sub-masks; a distribution density of the patterned sub-masks in the first area is less than a distribution density of the patterned sub-masks in the second area;
each patterned sub-mask includes a first pattern for forming a source electrode of a transistor, a second pattern for forming a drain electrode of the transistor, and a slit interposed between the first pattern and the second pattern; and a width of the slit in the first area is greater than a width of the slit in the second area.

10. The manufacturing method according to claim 9 , wherein forming the mask patterns on the transparent substrate by the patterning process specifically includes:
forming a photoresist layer on a surface of the light-shielding layer;
performing exposure and development on the photoresist layer, and forming patterned photoresist corresponding to the mask patterns; and
etching the light-shielding layer by taking the patterned photoresist as a mask, and forming the mask patterns.

11. The manufacturing method according to claim 10 , wherein performing exposure on the photoresist layer is executed by a laser exposure device.

12. The manufacturing method according to claim 10 , wherein in the exposure of the photoresist, the patterned photoresist respectively corresponding to a slit pattern in the first area and a slit pattern in the second area are formed by controlling a exposure quantity of photoresist corresponding to the slit in the first area to be greater than a exposure quantity of photoresist corresponding to the slit in the second area.

13. The manufacturing method according to claim 9 , wherein when the mask patterns are formed on the transparent substrate by the patterning processes, a wiring pattern is further formed in the same layer on the transparent substrate; and the wiring pattern is configured to form a wiring.

14. The manufacturing method according to claim 9 , wherein before depositing the light-shielding layer on the transparent substrate, the method further comprises cleaning the transparent substrate; and
after forming the mask patterns on the transparent substrate by the patterning process, the method further comprises checking the mask patterns formed on the transparent substrate and repairing defective mask patterns.

15. The exposure system according to claim 8 , wherein the width of the slit in the first area is L; the width of the slit in the second area is M; and M=L−L×X %, in which 0<X<100, and X is proportional to a difference between the distribution density of the patterned sub-masks in the second area and the distribution density of the patterned sub-masks in the first area.

16. The exposure system according to claim 15 , wherein both the first pattern and the second pattern are made from a light-shielding material; and a portion of the transparent substrate disposed at the bottom of the slit is exposed through the slit.

17. The exposure system according to claim 16 , wherein both the first pattern and the second pattern are made from the light-shielding material with low reflectivity.

18. The exposure system according to claim 8 , wherein each of the first area and the second area is further provided with a wiring pattern for forming a wiring.

19. The exposure system according to claim 18 , wherein the wiring pattern is arranged in a same layer with the first pattern and the second pattern and made from a material the same with the first pattern and the second pattern.

20. The exposure system according to claim 8 , wherein the first pattern and the second pattern in the mask patterns are disposed on a same surface of the transparent substrate.

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Luo Liping
• Liu Huishuang
• Hu Haichen
• Sun Zengbiao
• Wang Tao
• Kim Kiyong

Classifications

• H01L29/4908 Primary

  Electricity · mapped topic

• H01L29/458

  Electricity · mapped topic

• H01L27/1214

  Electricity · mapped topic

• H01L27/1262

  Electricity · mapped topic

• H01L27/127

  Electricity · mapped topic