Robust semiconductor power devices with design to protect transistor cells with slower switching speed

US10032584B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10032584-B2
Application numberUS-201414585201-A
CountryUS
Kind codeB2
Filing dateDec 30, 2014
Priority dateMar 3, 2008
Publication dateJul 24, 2018
Grant dateJul 24, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

This invention discloses a power switch that includes a fast-switch semiconductor power device and a slow-switch semiconductor power device controllable to turn on and off a current transmitting therethrough. The slow-switch semiconductor power device further includes a ballasting resistor for increasing a device robustness of the slow switch semiconductor power device. In an exemplary embodiment, the fast-switch semiconductor power device includes a fast switch metal oxide semiconductor field effect transistor (MOSFET) and the slow-switch semiconductor power device includes a slow switch MOSFET wherein the slow switch MOSFET further includes a source ballasting resistor.

First claim

Opening claim text (preview).

We claim: 1. A method for manufacturing a switch comprising: manufacturing a fast-switch semiconductor power device and a slow-switch semiconductor power device each having a gate to apply a gate voltage thereon for controlling a turn-on and turn-off of a current transmitting therethrough wherein the step of manufacturing said slow-switch semiconductor power device further comprising a step of connecting a robustness increasing circuit to said slow-switch semiconductor power device to handle a higher current and a higher voltage than said fast-switch semiconductor power device and wherein the step further comprising a step of connecting the gate of the slow-switch semiconductor power device through a resistor to the gate of the fast-switch semiconductor power device. 2. The method of claim 1 wherein: said step of connecting the robustness-increasing circuit to the slow-switch semiconductor power device further includes a step of connecting a ballasting resistor as the robustness-increasing circuit to the gate of said slow-switch semiconductor power device. 3. The method of claim 1 wherein: said step of manufacturing said fast-switch semiconductor power device and said slow switch semiconductor power device further comprising a step of manufacturing a fast switch metal oxide semiconductor field effect transistor (MOSFET) and a slow switch MOSFET by connecting a ballasting resistor as the robustness-increasing circuit to the gate of the slow switch MOSFET. 4. The method of claim 1 wherein: said step of manufacturing said slow-switch semiconductor power device further including a step of manufacturing said slow-switch semiconductor power device in a plurality of regions distributed over a semiconductor chip by connecting a ballasting resistor as the robustness-increasing circuit to the gate of the slow switch semiconductor power device in a plurality of regions distributed over the semiconductor chip. 5. The method of claim 1 wherein: said step of manufacturing said slow-switch semiconductor power device further including a step of disposing said slow-switch semiconductor power device near approximately a central location of a semiconductor chip by connecting a ballasting resistor as the robustness-increasing circuit to the gate of the slow switch semiconductor power device near approximately a central location of the semiconductor chip. 6. The method of claim 1 wherein: said step of manufacturing said slow-switch semiconductor power device further including a step of disposing said slow-switch semiconductor power device near approximately a peripheral location of a semiconductor chip by connecting a ballasting resistor as the robustness-increasing circuit to the gate of the slow switch semiconductor power device near approximately a peripheral location of the semiconductor chip. 7. The method of claim 1 wherein: said step of manufacturing said fast-switch and slow-switch semiconductor power devices comprising a step of manufacturing a plurality of fast switch MOSFET cells and a plurality of slow switch MOSFET cells by forming each of said slow switch MOSFET cells with a source ballasting resistor and by connecting a ballasting resistor as the robustness-increasing circuit to the source of the slow switch MOSFET cells. 8. The method of claim 1 wherein: said step of manufacturing said fast-switch and slow-switch semiconductor power devices comprising a step of manufacturing a plurality of fast switch MOSFET cells and a plurality of slow switch MOSFET cells and manufacturing each of said slow switch MOSFET cells with a source having an greater length with a higher resistance than said fast switch MOSFET cells. 9. The method of claim 1 wherein: said step of manufacturing said fast-switch and slow-switch semiconductor power devices comprising a step of manufacturing a plurality of fast switch MOSFET cells and a plurality of slow switch MOSFET cells and manufacturing each of said slow switch MOSFET cells with a source having a lower source dopant concentration with a higher resistance than said fast switch MOSFET cells.

Assignees

Inventors

Classifications

  • the devices being field-effect transistors · CPC title

  • in field-effect transistor switches · CPC title

  • Switch making · CPC title

  • using parallel switching arrangements · CPC title

  • in field-effect transistor switches · CPC title

Patent family

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Frequently asked questions

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What does patent US10032584B2 cover?
This invention discloses a power switch that includes a fast-switch semiconductor power device and a slow-switch semiconductor power device controllable to turn on and off a current transmitting therethrough. The slow-switch semiconductor power device further includes a ballasting resistor for increasing a device robustness of the slow switch semiconductor power device. In an exemplary embodime…
Who is the assignee on this patent?
Lui Sik K, Bhalla Anup, Alpha & Omega Semiconductor
What technology area does this patent fall under?
Primary CPC classification H01H49/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).