Electronic device having multiplexed input/output terminals

Patent metadata

Field	Value
Publication number	US-10031825-B2
Application number	US-201315022495-A
Country	US
Kind code	B2
Filing date	Sep 18, 2013
Priority date	Sep 18, 2013
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

An electronic device has terminals for interfacing internal signals to other electronic devices. Each terminal is electrically coupled to a terminal driver and a terminal control circuit for receiving a terminal configuration defining the properties and multiplexing of the terminal. The actual configuration of the terminal driver is set according to the terminal configuration. The device has at least one terminal checker arranged for comparing the actual configuration to at least one check configuration, the check configuration defining a configuration of the terminal driver that is either allowed or not allowed, and for, when said comparing indicates a not allowed configuration, setting the actual configuration to a default configuration. Advantageously safe operation of the device in a system is achieved by monitoring the configuration of the multiplexed terminals, and switching to a default configuration when in error.

First claim

The invention claimed is:

1. An electronic device, the device comprising:
at least one terminal arrangement to interface internal signals in the electronic device to external signals of other electronic devices via a terminal,
the terminal arrangement comprising the terminal, a terminal driver and a terminal control circuit,
the terminal control circuit including a storage unit to store pad multiplexor configuration data, a pad multiplexor, and a terminal checker including a first section coupled between a storage unit and a pad multiplexor and a second section coupled between the pad multiplexor and pads of the electronic device, the terminal control circuit configured to receive a terminal configuration, the terminal configuration defining properties of the terminal driver,
the terminal driver being coupled to the terminal control circuit configured to set an actual configuration of the terminal driver according to the terminal configuration, and the electronic device, the terminal checker configured to
compare the actual configuration to at least one check configuration, wherein the comparison between the actual configuration and the check configuration includes: the terminal checker to compare control signals being routed to a pad multiplexor to control signals defined in the check configuration, and to compare electrical properties of pads of the terminal arrangement to electrical properties of the pads defined in the check configuration, the check configuration defining a configuration of the terminal driver that is either allowed or not allowed,
and when the configuration of the terminal driver is a not allowed configuration, set the actual configuration to a default configuration.

2. The Device as claimed in claim 1 , wherein the terminal checker comprises a pad control checker to compare the actual configuration to at least one pad configuration comprised in the check configuration,
the pad configuration defines electrical properties of the terminal driver as experienced by the external signals via the terminal,
and when the configuration of the terminal driver is a not allowed configuration, set the actual configuration to a default pad configuration comprised in the default configuration.

3. The Device as claimed in claim 1 , wherein the terminal checker comprises a multiplex checker that compares the actual configuration to at least one multiplex configuration comprised in the check configuration,
the at least one multiplexing configuration defines multiplexing properties of the terminal driver for coupling at least one of the internal signals to the terminal,
and, when said comparing indicates a not allowed configuration, sets the actual configuration to a default multiplexing configuration comprised in the default configuration.

4. The Device as claimed in claim 1 , wherein the device comprises multiple terminal arrangements and a fault manager unit, and respective terminal checkers generate respective compare result signals coupled to the fault manager unit arranged that, upon receiving one or more of the compare result signals indicate a not allowed configuration, perform a fault management function.

5. The Device as claimed in claim 4 , wherein the fault manager unit performs the fault management function comprising at least one of:
initialization by sending the terminal configuration to the terminal control circuit;
error handling by correcting the indicated not allowed configuration and/or storing error data;
engaging a safe mode by sending a safe mode terminal configuration to the terminal control circuit.

6. The Device as claimed in claim 4 , wherein the fault manager unit comprises a processor programmed to perform the fault management function.

7. The Device as claimed in claim 1 , wherein the terminal checker comprises a compare enable input that,
upon receiving a enable signal, compares the actual configuration and, based thereon, sets the default configuration, and,
upon receiving a disable signal, sets the actual configuration of the terminal driver according to the terminal configuration irrespective of whether the configuration of the terminal driver is an allowed configuration.

8. The Device as claimed in claim 1 , wherein the terminal checker retrieves multiple check configurations from a database.

9. The Device as claimed in claim 1 , wherein the terminal checker receives at least one default configuration and stores the default configuration.

10. The Device as claimed in claim 1 , wherein the terminal checker comprises at least one preset default configuration.

11. The Device as claimed in claim 1 , wherein the terminal checker comprises at least one aggregated check configuration, the aggregated check configuration defining a combination of multiple configurations of respective multiple terminal drivers that are either allowed or not allowed.

12. The Device as claimed in claim 11 , wherein the aggregated check configuration defines the combination of multiple configurations of respective multiple terminal drivers according to a predefined standard.

13. The Device as claimed in claim 11 , wherein the terminal checker comprises a selection input to select the aggregated check configuration.

14. The Device as claimed in claim 2 , wherein the electrical properties in the pad configuration comprise at least one of
Pull Up Enable, which enables either a pull-up or pull-down internal resistor;
Pull Up Select, which selects whether pull-up or pull-down;
Open Drain Enable, which turns off a high side driver so the terminal has only as active low drive;
Slew Rate Enable, which enables a control of rise and fall time of an output signal;
Output Buffer Enable, which makes the terminal an output;
Input Buffer Enable, which enables a digital input buffer.

15. The Device as claimed in claim 1 , wherein the terminal checker is arranged to store at least one of said check configurations or default configurations in a RAM memory, in a ROM memory, in a set of flip-flops, or in a predetermined pattern of fixed connections.

16. A method of providing a safe mode of operation comprising:
providing at least one check configuration to a terminal checker during an initialization step, wherein a first section of the terminal checker is coupled between a storage unit and a pad multiplexor, a second section of the terminal checker is coupled between the pad multiplexor and pads of the electronic device, wherein the check configuration includes check control signals to be routed to the pad multiplexor of an electronic device, and check electrical properties of the pads;
sending at least one respective terminal configuration to a terminal control circuit during a configuration step, wherein the respective terminal configuration includes control signals being routed to the pad multiplexor and electrical properties of the pads;
comparing the control signals being routed to the pad multiplexor to the check control signals;
comparing the electrical properties of the pads to the check electrical properties of pads; and
determining whether the respective terminal configuration is allowed based on the comparing the control signals being routed to the pad multiplexor to the check control signals, and based on comparing the electrical properties of the pads to the check electrical properties of pads.

17. The Method as claimed in claim 16 , wherein the method further comprises
sending a default configuration to the terminal checker.

18. The Method as claimed in claim 16 , wherein the method further comprises at least one of
tempor

Assignees

• Litovtchenko Vladimir
• Kruecken Josef Maria Joachim
• Nxp Usa Inc

Inventors

• Litovtchenko Vladimir
• Kruecken Josef Maria Joachim

Classifications

• H03K5/04

  by increasing duration; by decreasing duration · CPC title

• G06F11/3041

  where the computing system component is an input/output interface (interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00) · CPC title

• G01R31/31723

  Hardware for routing the test signal within the device under test to the circuits to be tested, e.g. multiplexer for multiple core testing, accessing internal nodes (routing the test signal to or from the device under test G01R31/31926) · CPC title

• H03K19/1737 Primary

  using multiplexers (H03K19/1738 takes precedence) · CPC title

• G06F11/3051 Primary

  Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs (verification or detection of system hardware configuration G06F11/2247) · CPC title