Liquid crystal display

Patent metadata

Field	Value
Publication number	US-10031389-B2
Application number	US-201514849444-A
Country	US
Kind code	B2
Filing date	Sep 9, 2015
Priority date	Jan 8, 2015
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

A liquid crystal display includes: a substrate; a gate line, a data line, a first storage electrode line, and a second storage electrode line positioned on the substrate; a first thin film transistor, a second thin film transistor, and a third thin film transistor connected to the gate line and the data line; a fourth thin film transistor connected to the gate line, the third thin film transistor, and the second storage electrode line; a first subpixel electrode connected to the first thin film transistor; a second subpixel electrode connected to the second thin film transistor; a third subpixel electrode connected to the third thin film transistor; and a storage electrode connected to the first storage electrode line and overlapping the first subpixel electrode. Different voltages are applied to the three subpixels to improve lateral visibility of the liquid crystal display.

First claim

What is claimed is:

1. A liquid crystal display comprising:
a substrate;
a gate line, a data line, a first storage electrode line, and a second storage electrode line positioned on the substrate;
a first thin film transistor, a second thin film transistor, and a third thin film transistor connected to the gate line and the data line;
a fourth thin film transistor connected to the gate line, the third thin film transistor, and the second storage electrode line;
a first subpixel electrode connected to the first thin film transistor;
a second subpixel electrode connected to the second thin film transistor;
a third subpixel electrode connected to the third thin film transistor; and
a storage electrode connected to the first storage electrode line and overlapping the first subpixel electrode,
wherein the first subpixel electrode includes a crossed-shape stem including a transverse stem and a longitudinal stem, and a minute branch extending from the crossed-shape stem, and
the first storage electrode line overlaps the transverse stem of the first subpixel electrode.

2. The liquid crystal display of claim 1 , wherein
a first data voltage applied to the first subpixel electrode is higher than a second data voltage applied to the second subpixel electrode, and
the second data voltage applied to the second subpixel electrode is higher than a third data voltage applied to the third subpixel electrode.

3. The liquid crystal display of claim 1 , wherein
the first storage electrode line is alternately applied with a first voltage and a second voltage higher than the first voltage.

4. The liquid crystal display of claim 3 , wherein
after the gate line is applied with a gate-on voltage, the first storage electrode line is applied with the second voltage.

5. The liquid crystal display of claim 3 , wherein
when the first storage electrode line is applied with the second voltage, the first data voltage applied to the first subpixel electrode is increased.

6. The liquid crystal display of claim 1 , wherein
the second storage electrode line is applied with a constant voltage.

7. The liquid crystal display of claim 1 , wherein
the gate line and the data line are formed at different layers and are crossed.

8. The liquid crystal display of claim 7 , wherein
the first storage electrode line is positioned at a same layer as the gate line.

9. The liquid crystal display of claim 8 , wherein
the first storage electrode line extends in a direction parallel to the gate line.

10. The liquid crystal display of claim 7 , wherein
the second storage electrode line is positioned at a same layer as the data line.

11. The liquid crystal display of claim 10 , wherein
the second storage electrode line extends in a direction parallel to the data line.

12. The liquid crystal display of claim 11 , wherein
the second storage electrode line does not overlap the second subpixel electrode.

13. The liquid crystal display of claim 1 , wherein
the second subpixel electrode includes a first part and a second part respectively positioned at both sides with respect to the second storage electrode line.

14. The liquid crystal display of claim 13 , wherein
the first part and the second part of the second subpixel electrode respectively include:
a transverse stem;
an outer stem; and
a minute branch extending from the transverse stem and the outer stem.

15. The liquid crystal display of claim 13 , wherein
the first part and the second part are symmetrical with respect to the second storage electrode line.

16. The liquid crystal display of claim 1 , further comprising
a light blocking member positioned between the second subpixel electrode and the third subpixel electrode,
wherein the light blocking member is positioned at a same layer as the gate line.

17. The liquid crystal display of claim 1 , further comprising
a light blocking member positioned between the second subpixel electrode and the third subpixel electrode,
wherein the light blocking member is positioned at a same layer as the data line and is connected to the second storage electrode line.

18. A liquid crystal display comprising:
a substrate;
a gate line, a data line, a first storage electrode line, and a second storage electrode line positioned on the substrate;
a first thin film transistor, a second thin film transistor, and a third thin film transistor connected to the gate line and the data line;
a fourth thin film transistor connected to the gate line, the third thin film transistor, and the second storage electrode line;
a first subpixel electrode connected to the first thin film transistor;
a second subpixel electrode connected to the second thin film transistor;
a third subpixel electrode connected to the third thin film transistor; and
a storage electrode connected to the first storage electrode line and overlapping the first subpixel electrode,
wherein the first subpixel electrode includes:
a crossed-shaped stem including a transverse stem and a longitudinal stem, and;
a minute branch extending from the crossed-shape stem,
wherein the second storage electrode line overlaps the longitudinal stem of the first subpixel electrode.

19. A liquid crystal display comprising:
a substrate;
a gate line, a data line, a first storage electrode line, and a second storage electrode line positioned on the substrate;
a first thin film transistor, a second thin film transistor, and a third thin film transistor connected to the gate line and the data line;
a fourth thin film transistor connected to the gate line, the third thin film transistor, and the second storage electrode line;
a first subpixel electrode connected to the first thin film transistor;
a second subpixel electrode connected to the second thin film transistor;
a third subpixel electrode connected to the third thin film transistor; and
a storage electrode connected to the first storage electrode line and overlapping the first subpixel electrode,
wherein the third subpixel electrode includes a crossed-shape stem including a transverse stem and a longitudinal stem, and a minute branch extending from the crossed-shape stem, and
the second storage electrode line overlaps the longitudinal stem of the third subpixel electrode.

20. The liquid crystal display of claim 19 , wherein
the second storage electrode line bypasses an edge in a region between the first subpixel electrode and the second subpixel electrode.

Assignees

• Samsung Display Co Ltd
• Samsung Display Co Ltd

Inventors

• Jung Jae Hoon
• Kim Hoon
• Park Heung Shik
• Shin Ki Chul
• Hong Ji Phyo

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/1393

  the birefringence of the liquid crystal being electrically controlled, e.g. ECB-, DAP-, HAN-, PI-LC cells (G02F1/1396, G02F1/141 take precedence) · CPC title

• G02F1/136209

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/13306

  Circuit arrangements or driving methods for the control of single liquid crystal cells (G02F1/132, G02F1/133382 take precedence) · CPC title