Silicon-based optical ports providing passive alignment connectivity

Patent metadata

Field	Value
Publication number	US-10031299-B2
Application number	US-201615167137-A
Country	US
Kind code	B2
Filing date	May 27, 2016
Priority date	May 27, 2016
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

Optical ports providing passive alignment connectivity are disclosed. In one embodiment, an optical port includes a substrate having a surface, a photonic silicon chip, a connector body, and a plurality of spacer elements. The photonic silicon chip includes an electrical coupling surface, an upper surface and an optical coupling surface. The optical coupling surface is positioned between the electrical coupling surface and the upper surface. The photonic silicon chip further includes at least one waveguide terminating at the optical coupling surface, and a chip engagement feature disposed on the upper surface. The connector body includes a first alignment feature, a second alignment feature, a mounting surface, and a connector engagement feature at the mounting surface. The connector engagement feature mates with the chip engagement feature. The plurality of spacer elements is disposed between the electrical coupling surface of the photonic silicon chip and the surface of the substrate.

First claim

What is claimed is:

1. An optical port comprising:
a substrate comprising a surface;
a photonic silicon chip secured to the substrate, the photonic silicon chip comprising:
an electrical coupling surface, an upper surface and an optical coupling surface, wherein the optical coupling surface is positioned between the electrical coupling surface and the upper surface;
at least one optical waveguide terminating at the optical coupling surface; and
a chip engagement feature disposed on the upper surface;

a connector body secured to the substrate, the connector body comprising:
a mounting surface; and
a connector engagement feature at the mounting surface, wherein the connector engagement feature mates with the chip engagement feature of the photonic silicon chip; and

a plurality of spacer elements disposed between the electrical coupling surface of the photonic silicon chip and the surface of the substrate.

2. The optical port of claim 1 , wherein:
the substrate comprises a first trench and a second trench within the surface;
the connector body comprises a first leg portion and a second leg portion;
the first leg portion is disposed in the first trench;
the second leg portion is disposed within the second trench; and
the first leg portion and the second leg portion are secured to the substrate within the first trench and the second trench, respectively, by an adhesive.

3. The optical port of claim 2 , wherein the connector body further comprises a notch positioned between the first leg portion and the second leg portion.

4. The optical port of claim 2 , wherein the connector body further comprises a mechanical coupling surface intersecting the mounting surface, a first alignment feature comprising a first alignment bore at the mechanical coupling surface, and a second alignment feature comprising a second alignment bore at the mechanical coupling surface.

5. The optical port of claim 1 , wherein:
the chip engagement feature is a groove within the upper surface of the photonic silicon chip;
the connector engagement feature is a rib portion at the mounting surface; and
the rib portion of the connector body is disposed within the groove of the photonic silicon chip.

6. The optical port of claim 1 , wherein:
the chip engagement feature comprises a first socket and a second socket within the upper surface of the photonic silicon chip, a first sphere within the first socket, and a second sphere within the second socket;
the connector engagement feature comprises a groove within the mounting surface of the connector body; and
the first sphere and the second sphere are disposed within the groove of the connector body.

7. The optical port of claim 1 , wherein each spacer element of the plurality of spacer elements comprises an optical fiber disposed between a pair of gripper elements.

8. The optical port of claim 7 , wherein the pair of gripper elements is fabricated from a polymer material.

9. The optical port of claim 7 , wherein the photonic silicon chip is electrically coupled to the substrate by a ball grid array, and each spacer element is disposed between adjacent solder balls of the ball grid array.

10. The optical port of claim 9 , wherein the plurality of spacer elements controls a height of the solder balls of the ball grid array.

11. The optical port of claim 1 , wherein the photonic silicon chip comprises at least one optical source optically coupled to the at least one optical waveguide.

12. The optical port of claim 1 , further comprising a circuit board, wherein the substrate is electrically coupled to the circuit board by a ball grid array.

13. The optical port of claim 1 , wherein the connector body comprises a notch within the mounting surface, and the photonic silicon chip is disposed within a recess defined by the notch of the connector body and the surface of the substrate.

Assignees

• Corning Optical Communications LLC

Inventors

• Giziewicz Wojciech Piotr
• Luther James Phillip
• Matiss Andreas
• Overcash Jerald Lee

Classifications

• G02B6/4284

  of optical modules with disconnectable electrical connectors (latching arms for electrical connectors H01R13/627) · CPC title

• G02B6/4238

  Soldering · CPC title

• G02B6/3883

  using rods, pins or balls to align a plurality of pairs of ferrule ends · CPC title

• G02B6/423 Primary

  using guiding surfaces for the alignment · CPC title

• G02B6/4228

  Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements (G02B6/4234 takes precedence) · CPC title