Semiconductor device

Patent metadata

Field	Value
Publication number	US-10027285-B2
Application number	US-201715397803-A
Country	US
Kind code	B2
Filing date	Jan 4, 2017
Priority date	Jan 6, 2016
Publication date	Jul 17, 2018
Grant date	Jul 17, 2018

Abstract

In a semiconductor device according to related art, it is impossible to sufficiently correct an input offset of an operational amplifier. According to one embodiment, a semiconductor device calculates, when a voltage level of an output signal output in a state in which an input of the operational amplifier is short-circuited is determined, a correction code that adjusts the input offset of the operational amplifier based on a voltage level of an output signal determined based on a comparator circuit in a period during which the input offset is large and an output of the operational amplifier is close to a power supply voltage level or a ground voltage level and a correction code that adjusts the input offset of the operational amplifier based on a voltage level of an output signal determined based on an analog-to-digital conversion circuit in a period during which the input offset is small and the output of the operational amplifier is in an intermediate level between the power supply voltage and the ground voltage.

First claim

What is claimed is:

1. A semiconductor device comprising:
an operational amplifier comprising an offset adjustment function that mitigates an influence of an input offset based on a multi-bit correction code and an amplification function that amplifies an input signal and outputs the amplified signal;
an output determination unit that outputs a digital value in accordance with a magnitude of a voltage level of an output signal of the operational amplifier as an output determination value; and
an operation unit that calculates the multi-bit correction code based on the output determination value, wherein:
the operation unit calculates, when the voltage level of the output signal of the operational amplifier is outside of a fine adjustment range that is set in advance, the multi-bit correction code based on the number of bits smaller than that in a case in which the voltage level of the output signal of the operational amplifier is within the fine adjustment range.

2. The semiconductor device according to claim 1 , wherein:
the output determination unit comprises:
a comparator circuit that switches the logic level of the output determination value based on a comparison of magnitudes of the output signal of the operational amplifier and the reference voltage; and
an analog-to-digital conversion circuit that outputs a digital code indicating a value corresponding to the voltage level of the output signal of the operational amplifier as the output determination value in a number of bits larger than that of the output determination value output from the comparator circuit,
the operation unit calculates, when the voltage level of the output signal of the operational amplifier is outside of the fine adjustment range, the multi-bit correction code based on the output determination value output from the comparator circuit, and
the operation unit calculates, when the voltage level of the output signal of the operational amplifier is within the fine adjustment range, the multi-bit correction code based on the output determination value output from the analog-to-digital conversion circuit.

3. The semiconductor device according to claim 2 , wherein the output determination unit comprises a multiplexer that assigns the output signal of the operational amplifier to the comparator circuit and the analog-to-digital conversion circuit.

4. The semiconductor device according to claim 3 , wherein:
the comparator circuit comprises a first comparator circuit and a second comparator circuit,
the multiplexer comprises a reference voltage switch unit that receives a first reference voltage, a second reference voltage having a voltage value higher than that of the first reference voltage, and a third reference voltage having a voltage value lower than that of the first reference voltage, and switches a reference voltage to be output to the second comparator circuit based on the output value of the first comparator circuit,
the reference voltage switch unit outputs the first reference voltage to the first comparator circuit, and
the reference voltage switch unit outputs the second reference voltage to the second comparator circuit when the output value of the first comparator circuit indicates a first logic level and outputs the third reference voltage to the second comparator circuit when the output value of the first comparator circuit indicates a second logic level.

5. The semiconductor device according to claim 3 , wherein:
the multiplexer comprises a reference voltage switch unit that receives a first reference voltage, a second reference voltage having a voltage value higher than that of the first reference voltage, and a third reference voltage having a voltage value lower than that of the first reference voltage, and switches a reference voltage to be output based on a reference voltage selection signal output from the operation unit,
the operation unit performs reference voltage determination processing that determines a logic level of an output value of the comparator circuit in a state in which an instruction is being given to the reference voltage switch unit to output the first reference voltage to the comparator circuit,
the operation unit outputs, when it is determined in the reference voltage determination processing that the output value of the comparator circuit indicates a first logic level, a reference voltage selection signal that instructs to switch the reference voltage output from the reference voltage switch unit to the comparator circuit from the first reference voltage to the second reference voltage, and
the operation unit outputs, when it is determined in the reference voltage determination processing that the output value of the comparator circuit indicates a second logic level, a reference voltage selection signal that instructs to switch the reference voltage output from the reference voltage switch unit to the comparator circuit from the first reference voltage to the third reference voltage.

6. The semiconductor device according to claim 2 , wherein:
the analog-to-digital conversion circuit is a successive approximation analog-to-digital conversion circuit including the comparator circuit,
the operation unit calculates the multi-bit correction code based on a value of a predetermined bit in the digital code output from the analog-to-digital conversion circuit in a period during which the voltage level of the output signal of the operational amplifier is outside of the fine adjustment range, and
the operation unit calculates the multi-bit correction code based on a value of all bits of the digital code output from the analog-to-digital conversion circuit in a period during which the voltage level of the output signal of the operational amplifier is within the fine adjustment range.

7. The semiconductor device according to claim 1 , wherein:
the output determination unit outputs temperature data generated based on temperature information input from a temperature sensor that measures ambient temperature of the operational amplifier, and
the operation unit re-calculates the value of the multi-bit correction code when the temperature data exceeds an allowable range that has been set in advance.

8. The semiconductor device according to claim 3 , wherein:
the semiconductor device comprises a plurality of operational amplifiers, and
the multiplexer selects an output signal of one of the plurality of operational amplifiers based on an instruction from the operation unit and assigns the output signal of the operational amplifier that has been selected to the comparator circuit and the analog-to-digital conversion circuit.

9. The semiconductor device according to claim 1 , comprising:
a first register that sets an upper-limit voltage level of the fine adjustment range;
a second register that sets a lower-limit voltage level of the fine adjustment range; and
a reference voltage generation unit that outputs an upper-limit reference voltage in accordance with the upper-limit voltage level set in the first register and a lower-limit reference value in accordance with the lower-limit voltage level set in the second register,
wherein the output determination unit outputs, when the voltage level of the output signal of the operational amplifier is outside of the fine adjustment range that has been set in advance, information indicating whether the voltage level of the output signal of the operational amplifier is between the upper-limit reference voltage and the lower-limit reference voltage as the output determination value.

10. A semiconductor device comprising:
an operational amplifier comprising an offset adjustment function that mitigates an influence of an input offset based on a multi-bit cor

Assignees

• Renesas Electronics Corp

Inventors

• Tanabe Yusuke

Classifications

• H03F3/45071

  with semiconductor devices only · CPC title

• H03F3/45973

  by using a feedback circuit · CPC title

• H03M1/46

  with digital/analogue converter for supplying reference values to converter · CPC title

• H03F1/301

  in MOSFET amplifiers (H03F1/303, H03F1/305, H03F1/308 take precedence) · CPC title

• H03F3/005

  using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers (H03F3/45 takes precedence) · CPC title