Semiconductor wafer and manufacturing method

US10026816B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10026816-B2
Application numberUS-201514672783-A
CountryUS
Kind codeB2
Filing dateMar 30, 2015
Priority dateMar 30, 2015
Publication dateJul 17, 2018
Grant dateJul 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor wafer includes first and second main surfaces opposite to each other along a vertical direction, and a side surface encircling the semiconductor wafer. A lateral distance perpendicular to the vertical direction between the side surface and a center of the semiconductor wafer includes first and second parts. The first part extends from the side surface to the second part and the second part extends from the first part to the center. An average concentration of at least one of nitrogen and oxygen in the first part is greater than 5×1014 cm−3 and exceeds an average concentration of the at least one of nitrogen and oxygen in the second part by more than 20% of the average concentration of the at least one of nitrogen and oxygen in the second part.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor wafer, comprising: first and second main surfaces opposite to each other along a vertical direction; a side surface encircling the semiconductor wafer; and a lateral distance, perpendicular to the vertical direction, between the side surface and a center of the semiconductor wafer including first and second parts, the first part extending from the side surface to the second part and the second part extending from the first part to the center, and wherein an average concentration of nitrogen in the first part is greater than 5×10 14 atoms/cm 3 and exceeds an average concentration of nitrogen in the second part by more than 20% of the average concentration in the second part. 2. The semiconductor wafer of claim 1 , wherein the semiconductor wafer is a Czochralski silicon wafer or a Float Zone silicon wafer. 3. The semiconductor wafer of claim 1 , wherein a lateral dimension of the first part between the side surface and the second part ranges between 10 μm and 1 cm. 4. The semiconductor wafer of claim 1 , wherein a concentration of nitrogen decreases along more than 80% of a lateral dimension of the first part starting from the side surface. 5. The semiconductor wafer of claim 4 , wherein a profile of concentration of nitrogen equals a diffusion profile of dopants entering the semiconductor wafer through the side surface. 6. The semiconductor wafer of claim 1 , wherein a profile of concentration of nitrogen along the lateral distance is a step-concentration profile including a decrease of concentration at an interface between the first part and the second part. 7. The semiconductor wafer of claim 1 , wherein an average concentration of nitrogen in an edge part of the semiconductor wafer exceeds an average concentration of nitrogen in a central part encircled by the edge part by more than 20% of the average concentration of nitrogen in the central part. 8. The semiconductor wafer of claim 7 , wherein a maximum lateral dimension of the edge part between the side surface and the central part ranges between 10 μm and 1 cm. 9. The semiconductor wafer of claim 1 , wherein the semiconductor wafer is a 12 inch semiconductor wafer or larger. 10. The semiconductor wafer of claim 1 , wherein the average concentration of is more than 10 times greater in the first part than in the second part. 11. A method of manufacturing a semiconductor wafer, the method comprising: providing a block of semiconductor material, the block of semiconductor material comprising opposite first and second surfaces and a side surface encircling the semiconductor block; introducing at least one of nitrogen and oxygen into the semiconductor block through the side surface, wherein a lateral distance between the side surface and a center of the semiconductor block includes first and second parts, the first part extending from the side surface to the second part and the second part extending from the first part to the center, and wherein an average concentration of the at least one of nitrogen and oxygen in the first part is greater than 5×10 14 atoms cm −3 and exceeds the average concentration of the at least one of nitrogen and oxygen in the second part by more than 20% of the average concentration of the at least one of nitrogen and oxygen in the second part; and slicing the semiconductor block into semiconductor wafers. 12. The method of claim 11 , wherein the at least one of nitrogen and oxygen is introduced into the semiconductor block through the side surface by a furnace diffusion process. 13. The method of claim 12 , wherein the furnace diffusion process is carried out in a nitrogen atmosphere at temperatures larger than 1000° C. over a period of more than 1 hour. 14. The method of claim 12 , wherein the furnace diffusion process is carried out in an oxygen atmosphere at temperatures larger than 1100° C. over a period of more than 1 hour.

Assignees

Inventors

Classifications

  • Preparing bulk and homogeneous wafers · CPC title

  • being group IV material · CPC title

  • between a solid phase and a gaseous phase · CPC title

  • by contacting with diffusion material in the gaseous state · CPC title

  • Silicon · CPC title

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What does patent US10026816B2 cover?
A semiconductor wafer includes first and second main surfaces opposite to each other along a vertical direction, and a side surface encircling the semiconductor wafer. A lateral distance perpendicular to the vertical direction between the side surface and a center of the semiconductor wafer includes first and second parts. The first part extends from the side surface to the second part and the …
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H01L29/36. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).