High accuracy temperature sensor

Patent metadata

Field	Value
Publication number	US-10024729-B2
Application number	US-201615178363-A
Country	US
Kind code	B2
Filing date	Jun 9, 2016
Priority date	Mar 4, 2016
Publication date	Jul 17, 2018
Grant date	Jul 17, 2018

Abstract

A temperature sensor is disclosed. In one aspect, the temperature sensor provides a digital output having a precise degree/code step. For example, each step in the digital output code may correspond to one degree Celsius. In one aspect, a temperature sensor comprises a precision band-gap circuit and a sigma delta modulator (SDM) analog-to-digital convertor (ADC). A bandgap voltage and a PTAT voltage may be provided from the band-gap circuit as an input to the SDM ADC. The SDM ADC may produce an output based on the difference between the PTAT voltage and the bandgap voltage. The temperature sensor may also have logic that outputs a temperature code based on the output of the SDM ADC.

First claim

What is claimed is:

1. An apparatus, comprising:
a sigma delta modulator (SDM) analog-to-digital convertor (ADC) having an input and an output that responds to the input; and
logic configured to provide a proportional to absolute temperature voltage minus a temperature independent reference voltage to the input of the SDM ADC, the logic configured to generate a digital temperature code based on the output of the SDM ADC.

2. The apparatus of claim 1 , wherein the temperature independent reference voltage is a bandgap voltage.

3. The apparatus of claim 1 , further comprising:
a reference generator configured to generate the proportional to absolute temperature voltage and the temperature independent reference voltage.

4. The apparatus of claim 3 , wherein the reference generator is configured to compensate for offsets due to mismatched components within the reference generator.

5. The apparatus of claim 1 , wherein the SDM ADC is a one bit SDM ADC.

6. The apparatus of claim 1 , wherein the SDM ADC is a first order SDM ADC.

7. The apparatus of claim 1 , wherein the SDM ADC comprises:
a fully differential amplifier having inputs; and
a switched capacitor network having a plurality of capacitors coupled to the inputs of the fully differential amplifier, the plurality of capacitors configured to scale the temperature independent reference voltage.

8. The apparatus of claim 7 , wherein the switched capacitor network is configured to scale the temperature independent reference voltage such that the digital temperature code has a step size of a fixed amount of degrees Celsius per code in the digital temperature code.

9. The apparatus of claim 8 , wherein the logic is configured to trim one or more capacitors in the switched capacitor network to establish a scaling factor (K), wherein at a target temperature: the scaling factor multiplied by the temperature independent reference voltage depends on the proportional to absolute temperature voltage minus the temperature independent reference voltage.

10. The apparatus of claim 9 , wherein a ratio of capacitance of a first capacitor to a second capacitor in the switched capacitor network equals the scaling factor.

11. A method comprising:
generating a band gap voltage;
generating a proportional to absolute temperature voltage;
providing a voltage input signal as an input to a sigma delta modulator (SDM) analog-to-digital convertor (ADC), the voltage input signal comprising the proportional to absolute temperature voltage minus the band gap voltage; and
generating a digital temperature code based on an output of the SDM ADC.

12. The method of claim 11 , further comprising:
scaling the band gap voltage such that the digital temperature code has a step size of a fixed amount of degrees Celsius per code in the digital temperature code.

13. The method of claim 12 , further comprising:
trimming a capacitance ratio of capacitors in a switched capacitor network in the SDM ADC to establish the scaling of the band gap voltage.

14. The method of claim 13 , further comprising:
trimming the band gap voltage prior to trimming the capacitance ratio of the capacitors; and
trimming the proportional to absolute temperature voltage after trimming the capacitance ratio of the capacitors.

15. An apparatus comprising:
a reference generator configured to generate a bandgap voltage and a proportional to absolute temperature voltage;
a first order, single-bit sigma delta modulator (SDM) analog-to-digital convertor (ADC); and
control logic configured to provide the proportional to absolute temperature voltage minus the bandgap voltage as an input of the SDM ADC, the control logic configured to generate a digital temperature code based on an output of the SDM ADC.

16. The apparatus of claim 15 , wherein:
the SDM ADC comprises a plurality of capacitors;
during a sample phase the control logic is configured to provide the proportional to absolute temperature voltage to a first capacitor of the capacitors, to provide the bandgap voltage to a second capacitor of the capacitors, to provide ground to a third capacitor of the capacitors, and to provide the bandgap voltage to a fourth capacitor of the capacitors;
during an integration phase the control logic is configured to connect the first capacitor and the third capacitor to a first input of the SDM ADC and to connect the second capacitor and the fourth capacitor to a second input of the SDM ADC; and
a ratio of the fourth capacitor to the second capacitor scales the bandgap voltage such that the digital temperature code has a step size of one degree Celsius per code in the digital temperature code.

17. The apparatus of claim 15 , wherein the SDM ADC comprises:
a fully differential amplifier having a non-inverting input, an inverting input, a first output and a second output;
a first integrating capacitor connected between the first output and the non-inverting input;
a second integrating capacitor connected between the second output and the inverting input;
a first input capacitor, a second input capacitor, a third input capacitor, and a fourth input capacitor configured in a switched capacitor network,
wherein the control logic is configured to cause the first input capacitor to sample the proportional to absolute temperature voltage and to cause the second input capacitor to sample the bandgap voltage;
wherein the control logic is configured to connect the first input capacitor to the non-inverting input after the first capacitor samples the proportional to absolute temperature voltage;
wherein the control logic is configured to connect the second input capacitor to the inverting input after the second input capacitor samples the bandgap voltage.

18. The apparatus of claim 17 , wherein the control logic is configured to cause the first input capacitor to sample the proportional to absolute temperature voltage, the second input capacitor to sample the bandgap voltage, the third input capacitor to sample ground, and the fourth input capacitor to sample the bandgap voltage; and
wherein the control logic is configured to connect the first input capacitor to the non-inverting input after the first input capacitor samples the proportional to absolute temperature voltage, connect the second input capacitor to the inverting input after the second input capacitor samples the bandgap voltage, connect the third input capacitor to the non-inverting input after the third input capacitor samples ground, and connect the fourth input capacitor to the inverting input after the fourth input capacitor samples the bandgap voltage.

19. An apparatus, comprising:
reference voltage generation means for generating a band gap voltage, the reference voltage generation means further for generating a proportional to absolute temperature voltage; and
control means for providing the proportional to absolute temperature voltage minus the band gap voltage as an input of a sigma delta modulator (SDM) analog-to-digital convertor (ADC), wherein the control means is further for generating a digital temperature code based on an output of the SDM ADC.

20. The apparatus of claim 19 , further comprising:
scaling means for scaling the band gap voltage such that the digital temperature code has a step size of a fixed amount of degrees Celsius per code in the digital temperature code.

Assignees

• Sandisk Technologies Llc

Inventors

• Singh Saurabh Kumar

Classifications

• H03M3/456

  the modulator having a first order loop filter in the feedforward path · CPC title

• G01K7/34 Primary

  using capacitative elements (capacitors per se H01G) · CPC title

• H03M3/458

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

• H03M3/43

  the quantiser being a single bit one · CPC title

• G05F3/245 Primary

  producing a voltage or current as a predetermined function of the temperature · CPC title