PSoC architecture

US10020810B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10020810-B2
Application numberUS-201514976580-A
CountryUS
Kind codeB2
Filing dateDec 21, 2015
Priority dateOct 26, 2000
Publication dateJul 10, 2018
Grant dateJul 10, 2018

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example semiconductor chip includes analog circuits, digital circuits, and a digital input port. The digital input port is to receive an input signal. The analog circuit is to receive the input signal from the digital input port and produce a digital signal based on the input signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor chip comprising: analog circuits; digital circuits; and a digital input port configured to receive an input signal, wherein the analog circuit is configured to receive the input signal from the digital input port and produce a digital signal based on the input signal. 2. The semiconductor chip of claim 1 , wherein the digital circuits are configured to receive the digital signal produced by the analog circuits. 3. The semiconductor chip of claim 1 , wherein the input signal comprises a series of pulses received from a device located external to the semiconductor chip. 4. The semiconductor chip of claim 1 , further comprising a memory element, the memory element to store configuration data, wherein after the digital circuits provide a first digital function, the digital circuits are changeable to provide a second digital function, based on the configuration data. 5. The semiconductor chip of claim 4 , wherein the memory element to store further configuration data, wherein a parameter of the first digital function is adjustable, based on the further configuration data.

Assignees

Inventors

Classifications

  • Means for saving power · CPC title

  • Clock generators with changeable or programmable clock frequency · CPC title

  • Structural details of routing resources · CPC title

  • using elementary logic circuits as components · CPC title

  • H03K19/08Primary

    using semiconductor devices (H03K19/173 takes precedence; wherein the semiconductor devices are only diode rectifiers H03K19/12) · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10020810B2 cover?
An example semiconductor chip includes analog circuits, digital circuits, and a digital input port. The digital input port is to receive an input signal. The analog circuit is to receive the input signal from the digital input port and produce a digital signal based on the input signal.
Who is the assignee on this patent?
Cypress Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H03K19/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 10 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).