Amplifier

US10020780B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10020780-B2
Application numberUS-201715419516-A
CountryUS
Kind codeB2
Filing dateJan 30, 2017
Priority dateFeb 4, 2016
Publication dateJul 10, 2018
Grant dateJul 10, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An amplifier including a first cascode circuit including a first transistor and a second transistor whose source or emitter is coupled to a drain or a collector of the first transistor, a second cascode circuit being a differential pair with the first cascode circuit, the second cascode circuit including a third transistor whose source or emitter is coupled to a source or an emitter of the first transistor and a fourth transistor whose source or emitter is coupled to a drain or collector of the third transistor, a first feedback path that couples between an output terminal of the third transistor and an input terminal of the first transistor, the first feedback path including a first capacitative element, and a second feedback path that couples between an output terminal of the first transistor and an input terminal of the third transistor, the second feedback path including a second capacitative element.

First claim

Opening claim text (preview).

What is claimed is: 1. An amplifier comprising: a first cascode circuit including: a first transistor; and a second transistor whose source or emitter is coupled to a drain or a collector of the first transistor; a second cascode circuit that forms a differential pair with the first cascode circuit, the second cascode circuit including: a third transistor whose source or emitter is coupled to a source or an emitter of the first transistor; and a fourth transistor whose source or emitter is coupled to a drain or collector of the third transistor; a first feedback path that couples between an output terminal of the third transistor and an input terminal of the first transistor, the first feedback path including a first capacitative element; a second feedback path that couples between an output terminal of the first transistor and an input terminal of the third transistor, the second feedback path including a second capacitative element; a third feedback path that couples between an output terminal of the second transistor and an input terminal of the second transistor, the third feedback path including a third capacitative element; a fourth feedback path that couples between an output terminal of the fourth transistor and an input terminal of the fourth transistor, the fourth feedback path including a fourth capacitative element; a fifth feedback path that couples between an output terminal of the fourth transistor and the input terminal of the first transistor, the fifth feedback path including a fifth capacitative element; and a sixth feedback path that couples between an output terminal of the second transistor and the input terminal of the third transistor, the sixth feedback path including a sixth capacitative element. 2. An amplifier comprising: a pair of cascode circuits as a differential pair, each cascode circuit including: a first transistor; a second transistor whose source or emitter is connected to a drain or collector of the first transistor; and a feedback path that couples between an output terminal of the second transistor and an input terminal of the second transistor, the feedback path including a capacitative element; and a pair of capacitative elements and a pair of feedback paths, wherein one of the pair of the feedback paths is a path on which an output terminal of a second transistor included in one of the cascode circuits forming the differential pair is connected to an input terminal of a first transistor included in the other of the cascode circuits forming the differential pair via one of the pair of capacitative elements, and wherein the other of the pair of the feedback paths is a path on which an output terminal of a second transistor included in the other of the cascode circuits forming the differential pair is connected to an input terminal of a first transistor included in the other of the cascode circuits forming the differential pair via the other of the pair of capacitative elements.

Assignees

Inventors

Classifications

  • using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

  • with semiconductor devices only · CPC title

  • Non-folded cascode stages · CPC title

  • with field-effect devices (H03F3/195 takes precedence) · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

Patent family

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Frequently asked questions

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What does patent US10020780B2 cover?
An amplifier including a first cascode circuit including a first transistor and a second transistor whose source or emitter is coupled to a drain or a collector of the first transistor, a second cascode circuit being a differential pair with the first cascode circuit, the second cascode circuit including a third transistor whose source or emitter is coupled to a source or an emitter of the firs…
Who is the assignee on this patent?
Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H03F1/0233. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 10 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).