Field-effect transistor, semiconductor memory display element, image display device, and system

Patent metadata

Field	Value
Publication number	US-10020374-B2
Application number	US-201013515463-A
Country	US
Kind code	B2
Filing date	Dec 22, 2010
Priority date	Dec 25, 2009
Publication date	Jul 10, 2018
Grant date	Jul 10, 2018

Abstract

A field-effect transistor includes a substrate; a source electrode, a drain electrode, and a gate electrode that are formed on the substrate; a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and a gate insulating layer provided between the gate electrode and the semiconductor layer. The gate insulating layer is formed of an amorphous composite metal oxide insulating film including one or two or more alkaline-earth metal elements and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce.

First claim

The invention claimed is:

1. A field-effect transistor comprising:
a substrate;
a source electrode, a drain electrode, and a gate electrode formed on the substrate;
a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and
a paraelectric gate insulating layer having a portion thereof provided between the gate electrode and the semiconductor layer,
wherein the paraelectric gate insulating layer is formed of a composite metal oxide insulating film having an amorphous structure and including one or two or more elements selected from a group consisting of Be, Mg, Ca, Sr, and Ra and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce, the composite metal oxide insulating film having a resistivity greater than or equal to 1.1E+04 Ω·cm,
wherein the composite metal oxide insulating film excludes a perovskite metal oxide and a layer type perovskite metal oxide, and
wherein the paraelectric gate insulating layer is in direct contact with the semiconductor layer.

2. The field-effect transistor according to claim 1 , wherein the semiconductor layer is an oxide semiconductor.

3. The field-effect transistor according to claim 1 , wherein the substrate is an insulating substrate.

4. The field-effect transistor according to claim 1 , wherein the substrate is a semiconductor substrate.

5. A volatile semiconductor memory comprising:
the field-effect transistor according to claim 1 ;
a first capacitor electrode connected to the drain electrode;
a second capacitor electrode; and
a capacitor dielectric layer provided between the first capacitor electrode and the second capacitor electrode.

6. The volatile semiconductor memory according to claim 5 , wherein the capacitor dielectric layer is formed of an amorphous composite metal oxide insulating film including one or two or more alkaline-earth metal elements and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce.

7. A non-volatile semiconductor memory comprising:
the field-effect transistor according to claim 1 ,
wherein a second gate insulating layer and a floating gate electrode are provided between the semiconductor layer and the gate insulating layer.

8. A display element comprising:
an optical control element whose optical output is controlled in accordance with driving signals; and
a driving circuit that drives the optical control element, the driving circuit including the field-effect transistor according to claim 1 .

9. The display element according to claim 8 , wherein the optical control element includes an organic electro luminescence element.

10. The display element according to claim 8 , wherein the optical control element includes a liquid crystal element.

11. The display element according to claim 8 , wherein the optical control element includes an electrochromic element.

12. The display element according to claim 8 , wherein the optical control element includes an electrophoretic element.

13. The display element according to claim 8 , wherein the optical control element includes an electrowetting element.

14. An image display device for displaying an image in accordance with image data, comprising:
a plurality of the display elements according to claim 8 arranged in a matrix;
a plurality of wirings that separately apply gate voltages to the field-effect transistors included in the plural display elements; and
a display control device that separately controls the gate voltages of the field-effect transistors via the plural wirings, in accordance with the image data.

15. A system comprising:
the image display device according to claim 14 ; and
an image data creating device that creates the image data based on image information to be displayed, and that outputs the image data to the image display device.

16. The field-effect transistor according to claim 1 , wherein a volume resistivity of the composite metal oxide insulating film is ρ>5.9E+6 Ωcm.

17. The field-effect transistor according to claim 1 , wherein the resistivity of the paraelectric gate insulating film does not change with respect to voltage applied from the gate electrode.

18. A field-effect transistor comprising:
a substrate;
a source electrode, a drain electrode, and a gate electrode formed on the substrate;
a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and
a paraelectric gate insulating layer having a portion thereof provided between the gate electrode and the semiconductor layer,
wherein the paraelectric gate insulating layer consists of a composite metal oxide insulating film having an amorphous structure and including one or two or more elements selected from a group consisting of Be, Mg, Ca, Sr, and Ra and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce,
wherein the composite metal oxide insulating film excludes a perovskite metal oxide and a layer type perovskite metal oxide, and
wherein the paraelectric gate insulating layer is in direct contact with the semiconductor layer.

19. The field-effect transistor according to claim 18 , wherein the resistivity of the paraelectric gate insulating film does not change with respect to voltage applied from the gate electrode.

20. A field-effect transistor comprising:
a substrate;
a source electrode, a drain electrode, and a gate electrode formed on the substrate;
a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and
a paraelectric gate insulating layer having a portion thereof provided between the gate electrode and the semiconductor layer,
wherein the paraelectric gate insulating layer is formed of a composite metal oxide insulating film having an amorphous structure and including one or two or more elements selected from a group consisting of Be, Mg, Ca, Sr, and Ra and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce, the composite metal oxide insulating film having a resistivity greater than or equal to 1.1E+04 Ω·cm,
wherein the paraelectric gate insulating layer is in direct contact with the semiconductor layer, and
wherein the composite metal oxide insulating film excludes a perovskite metal oxide and a layer type perovskite metal oxide.

21. The field-effect transistor according to claim 20 , wherein the resistivity of the paraelectric gate insulating film does not change with respect to voltage applied from the gate electrode.

Assignees

• Sone Yuji
• Ueda Naoyuki
• Nakamura Yuki
• Abe Yukiko
• Ricoh Co Ltd

Inventors

• Sone Yuji
• Ueda Naoyuki
• Nakamura Yuki
• Abe Yukiko

Classifications

• G09G3/20

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• G09G3/3648

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• H01L27/3262

  Electricity · mapped topic

• H01L27/3248

  Electricity · mapped topic

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title