Removal of basal plane dislocations from silicon carbide substrate surface by high temperature annealing and preserving surface morphology

Patent metadata

Field	Value
Publication number	US-10020366-B2
Application number	US-201615272736-A
Country	US
Kind code	B2
Filing date	Sep 22, 2016
Priority date	Sep 25, 2015
Publication date	Jul 10, 2018
Grant date	Jul 10, 2018

Abstract

A method and device including adding a protective layer on the surface of a substrate, annealing the substrate at a temperature approximately greater or equal to 1850° C., removing the protective layer from the surface of the substrate after the annealing, and growing a first epilayer on the substrate after the removing of the protective layer, wherein the first epilayer is grown without attempting to prevent the basal plane dislocations to propagate in the first epilayer when growing the first epilayer, and wherein the first epilayer is free of the basal plane dislocations.

First claim

What is claimed is:

1. A method for reducing basal plane dislocations on a surface of a silicon carbide substrate to propagate to a first epilayer grown on the substrate, said method comprising:
adding a protective layer on said surface of said substrate, wherein said surface of said substrate has a number of basal plane dislocations;
annealing said substrate at a temperature approximately greater or equal to 1850° C., wherein said annealing embeds said basal plane dislocations within said substrate and below said surface of said substrate;
removing said protective layer from said surface of said substrate after said annealing; and
growing a first epilayer on said substrate after said removing of said protective layer,
wherein said first epilayer is grown without attempting to prevent said basal plane dislocations to propagate in said first epilayer when growing said first epilayer, and
wherein said first epilayer has up to three times less basal plane dislocations propagating from said surface of said substrate.

2. The method of claim 1 , wherein said protective layer comprises a carbon layer.

3. The method of claim 1 , wherein said silicon carbide substrate comprises a 4° offcut, with an approximately 100 mm diameter, n-type 4H-SiC substrate.

4. The method of claim 1 , wherein the growing of said first epilayer comprises using a chemical vapor deposition growth process.

5. The method of claim 1 , wherein said first epilayer is at least approximately 20 μm thick.

6. The method of claim 1 , wherein said annealing to approximately greater or equal to 1850° C. further comprises annealing said substrate for approximately 10 minutes in an induction high temperature furnace with Ar ambient at approximately 200 Torr.

7. The method of claim 1 , further comprising growing a second epilayer on said first epilayer, wherein said second epilayer is grown without attempting to prevent said basal plane dislocations to propagate in said second epilayer when growing said first epilayer, and wherein said second epilayer is free of said basal plane dislocations.

8. The method of claim 7 , wherein the growing of said second epilayer comprises using a chemical vapor deposition growth process.

9. The method of claim 7 , wherein said second epilayer is at least approximately 20 μm thick.

10. A method for reducing basal plane dislocations on a surface of a silicon carbide substrate to propagate to an epilayer grown on the substrate, said method comprising:
adding a surface protective layer on said surface of said substrate, wherein said surface of said substrate has a number of basal plane dislocations;
annealing said substrate at a temperature approximately greater or equal to 1850° C., wherein said annealing embeds said basal plane dislocations within said substrate and below said surface of said substrate; and
growing a first epilayer on said substrate after said annealing, wherein after said annealing said first epilayer has up to three times less basal plane dislocations propagating from said surface of said substrate.

11. The method of claim 10 , wherein said basal plane dislocations propagate as threading edge dislocations in said first epilayer during said growing of said first epilayer in any desired thickness of said first epilayer.

12. The method of claim 11 , wherein said thickness of said first epilayer is at least approximately 10 μm.

13. The method of claim 10 , wherein a roughness of a surface of said epilayer is preserved.

14. The method of claim 10 , further comprising growing a second epilayer on said first epilayer, wherein said threading edge dislocations in said first epilayer propagate as successive threading edge dislocations in said second epilayer during said growing of said second epilayer.

15. The method of claim 14 , wherein the growing of said first epilayer and the growing of said second epilayer comprises using a chemical vapor deposition growth process.

16. The method of claim 10 , wherein said annealing to approximately greater or equal to 1850° C. further comprises annealing said substrate for approximately 10 minutes in an induction high temperature furnace with Ar ambient at approximately 200 Torr.

17. A device comprising:
a silicon carbide substrate, wherein the substrate comprises basal plane dislocations, and wherein said basal plane dislocations are embedded below a surface of said substrate by annealing said substrate at approximately at least 1850° C.; and
a first epilayer on said silicon carbide substrate, wherein said first epilayer is grown on said substrate after said annealing of said substrate, and wherein said first epilayer has up to three times less basal plane dislocations propagating from said surface of said substrate.

18. The device of claim 17 , wherein said basal plane dislocations in said substrate are converted to threading edge dislocations within said first epilayer growth.

19. The device of claim 17 , further comprising a second epilayer over said first epilayer, wherein said second epilayer is free from said basal plane dislocations.

20. The device of claim 17 , wherein said first epilayer is at least approximately 10 μm thick.

Assignees

• Us Navy

Inventors

• Mahadik Nadeemullah A
• Stahlbush Robert E
• Imhoff Eugene A
• Tadjer Marko J

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P14/3408

  Silicon carbide · CPC title

• H10P14/2926

  Crystal orientations · CPC title

• H10P14/2904

  Silicon carbide · CPC title

• H10P14/36

  characterised by treatments done before the formation of the materials · CPC title