Storage devices, memory systems and operating methods to suppress operating errors due to variations in environmental conditions

Patent metadata

Field	Value
Publication number	US-10019188-B2
Application number	US-201615016464-A
Country	US
Kind code	B2
Filing date	Feb 5, 2016
Priority date	Feb 17, 2015
Publication date	Jul 10, 2018
Grant date	Jul 10, 2018

Abstract

In a method for operating a NAND flash memory system, a temperature sensing device detects a decrease in temperature of the NAND flash memory system below a first threshold temperature level, and a clock control unit adjusts an operating condition for a memory access operation in response to detecting the decrease in the temperature below the first threshold temperature level.

First claim

What is claimed is:

1. A method for operating a NAND flash memory system, the method comprising:
detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level; and
adjusting an operating condition for a memory access operation in response to the detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level;
wherein the operating condition includes a data I/O speed for the memory access operation; and
wherein the adjusting includes decreasing the data I/O speed for the memory access operation from a first data I/O speed to a second data I/O speed in response to the detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level.

2. The method of claim 1 , further comprising:
detecting a further decrease in the temperature of the NAND flash memory system below a second threshold temperature level, the second threshold temperature level being less than the first threshold temperature level; and
decreasing the data I/O speed from the second data I/O speed to a third data I/O speed in response to the detecting a further decrease in the temperature of the NAND flash memory system below a second threshold temperature level.

3. The method of claim 1 , further comprising:
detecting an increase in the temperature of the NAND flash memory system above the first threshold temperature level; and
increasing the data I/O speed from the second data I/O speed to the first data I/O speed in response to the detecting an increase in the temperature of the NAND flash memory system above the first threshold temperature level.

4. The method of claim 1 , wherein
the operating condition further includes a read voltage level for the memory access operation; and
the adjusting further includes increasing the read voltage level from a first read voltage level to a second read voltage level for the memory access operation in response to the detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level.

5. The method of claim 4 , further comprising:
detecting a further decrease in the temperature of the NAND flash memory system below a second threshold temperature level, the second threshold temperature level being less than the first threshold temperature level; and
increasing the read voltage level from the second read voltage level to a third read voltage level in response to the detecting a further decrease in the temperature of the NAND flash memory system below a second threshold temperature level.

6. The method of claim 4 , further comprising:
detecting an increase in the temperature of the NAND flash memory system above the first threshold temperature level; and
decreasing the read voltage level from the second read voltage level to the first read voltage level in response to the detecting an increase in the temperature of the NAND flash memory system above the first threshold temperature level.

7. The method of claim 1 , wherein
the operating condition further includes a drive strength for the NAND flash memory system; and
the adjusting further includes increasing the drive strength from a first drive strength to a second drive strength in response to the detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level.

8. The method of claim 7 , further comprising:
detecting a further decrease in the temperature of the NAND flash memory system below a second threshold temperature level, the second threshold temperature level being less than the first threshold temperature level; and
increasing the drive strength from the second drive strength to a third drive strength in response to the detecting a further decrease in the temperature of the NAND flash memory system below a second threshold temperature level.

9. The method of claim 7 , further comprising:
detecting an increase in the temperature of the NAND flash memory system above the first threshold temperature level; and
decreasing the drive strength from the second drive strength to the first drive strength in response to the detecting an increase in the temperature of the NAND flash memory system above the first threshold temperature level.

10. A method for operating a memory system, the method comprising:
adjusting a data I/O speed for a memory access operation based on temperature information associated with the memory system, wherein
the adjusting decreases the data I/O speed to a first data I/O speed if the temperature information indicates that a temperature of the memory system is below a first threshold temperature level,
the adjusting adjusts the data I/O speed to a second data I/O speed if the temperature information indicates that the temperature of the memory system is between the first threshold temperature level and a second threshold temperature level, and
the adjusting decreases the data I/O speed to a third data I/O speed if the temperature information indicates that the temperature of the memory system is greater than the second threshold temperature level.

11. The method of claim 10 , wherein the first data I/O speed and the third data I/O speed are less than the second data I/O speed.

12. The method of claim 10 , wherein
the memory access operation is a read operation; and
the method further includes determining a read voltage for the read operation based on the data I/O speed.

13. The method of claim 12 , wherein the determining determines the read voltage using a valley search operation.

14. A method for operating a NAND flash memory system, the method comprising:
detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level;
decreasing at least one of a clock frequency and a data I/O speed for a memory access operation in response to the detecting a decrease in temperature of the NAND flash memory system below a first threshold temperature level;
detecting a first error in performing a first iteration of the memory access operation;
adjusting, in response to the detecting a first error, an operating condition for a second iteration of the memory access operation, the operating condition being one of (i) a read voltage level for the memory access operation, and (ii) a drive strength for the NAND flash memory system; and
performing the second iteration of the memory access operation according to the operating condition and the at least one of the clock frequency and the data I/O speed.

15. The method of claim 14 , further comprising:
detecting a second error in the performing the second iteration of the memory access operation; and wherein
the decreasing decreases the at least one of the clock frequency and the data I/O speed in response to the detecting a second error.

16. The method of claim 14 , wherein
the decreasing decreases the at least one of the clock frequency and the data I/O speed from a first level to a second level; and
the method further includes
detecting a decrease in the temperature of the NAND flash memory system below a second threshold temperature level, the second threshold temperature level being less than the first threshold temperature level; and
decreasing the at least one of the clock frequency and the data I/O speed for the memory access operation from the second level to a third level in response to the detecting a decrease in the temperature of the NAND flash memory system below a second threshold temperature level.

17. The method of claim 14 , wherein
the

Assignees

• Chung Woonjae
• SHIN HanShin
• Samsung Electronics Co Ltd

Inventors

• Chung Woonjae
• SHIN HanShin

Classifications

• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title

• G06F3/0629 Primary

  Configuration or reconfiguration of storage systems · CPC title

• G11C7/04 Primary

  with means for avoiding disturbances due to temperature effects · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G11C16/28

  using differential sensing or reference cells, e.g. dummy cells · CPC title