Image sensor having wide dynamic range, pixel circuit of the image sensor, and operating method of the image sensor

Patent metadata

Field	Value
Publication number	US-10015428-B2
Application number	US-201615190297-A
Country	US
Kind code	B2
Filing date	Jun 23, 2016
Priority date	Jul 7, 2015
Publication date	Jul 3, 2018
Grant date	Jul 3, 2018

Abstract

A pixel circuit includes a first photocharge accumulator including at least two photodiodes exposed to light for a long period of time, and a second photocharge accumulator including at least one photodiode exposed to light for a short period of time. The pixel circuit includes a first transfer controller that transfers photocharges accumulated in the first photocharge accumulator to a floating diffusion area, and a second transfer controller that transfers photocharges accumulated in the second photocharge accumulator to the floating diffusion area. The pixel circuit includes a driving transistor to generate a pixel signal according to the photocharges transferred to the floating diffusion area. A number of photodiodes of the first photocharge accumulator is greater than a number of photodiodes of the second photocharge accumulator.

First claim

What is claimed is:

1. A pixel circuit of an image sensor, the pixel circuit comprising:
a first photocharge accumulator comprising at least two photodiodes configured to be exposed to light for a first period of time;
a second photocharge accumulator comprising at least one photodiode configured to be exposed to the light for a second period of time that is shorter than the first period of time, a number of the at least two photodiodes being greater than a number of the at least one photodiode;
at least one first transfer controller configured to transfer photocharges accumulated in the first photocharge accumulator to a floating diffusion area, the at least one first transfer controller including a plurality of first transfer controller, the plurality of first transfer controllers configured to individually control the at least two photodiodes such that the photocharges accumulated in the at least two photodiodes are transferred to the floating diffusion area;
a second transfer controller configured to transfer photocharges accumulated in the second photocharge accumulator to the floating diffusion area; and
a driving transistor configured to generate a pixel signal according to the photocharges transferred to the floating diffusion area.

2. The pixel circuit of claim 1 , wherein if the image sensor captures an image corresponding to one frame, a number of photocharges accumulated in the first photocharge accumulator is greater than a number of photocharges accumulated in the second photocharge accumulator.

3. The pixel circuit of claim 1 , wherein the at least two photodiodes comprises first through m th photodiodes, and the at least one photodiode comprises first through n th photodiodes, where m and n are integers and m is greater than n,
the first transfer controller comprises first through m th transfer transistors corresponding to the first through m th photodiodes, and
the second transfer controller comprises first through n th transfer transistors corresponding to the first through n th photodiodes.

4. The pixel circuit of claim 1 , wherein at least a portion of a time period in which the first photocharge accumulator accumulates the photocharges overlaps a time period in which the second photocharge accumulator accumulates the photocharges.

5. The pixel circuit of claim 1 , wherein after a first pixel signal is generated according to the photocharges accumulated in the first photocharge accumulator, a second pixel signal is generated according to the photocharges accumulated in the second photocharge accumulator.

6. The pixel circuit of claim 1 , wherein a size of the at least one photodiode of the first photocharge accumulator is the same as a size of the at least one photodiode of the second photocharge accumulator.

7. The pixel circuit of claim 1 , wherein a size of the at least one photodiode of the first photocharge accumulator is greater than a size of the at least one photodiode of the second photocharge accumulator.

8. An image sensor comprising:
a pixel array comprising a plurality of pixels, each of the pixels comprising a plurality of sub-pixels, the plurality of sub-pixels comprising m first sub-pixels and n second sub-pixels, each of the m first sub-pixels comprising a first photodiode, each of the n second sub-pixels comprising a second photodiode, the m first sub-pixels being exposed to light for a longer period of time than the n second sub-pixels, where m and n are integers,
a read circuit configured to generate pixel data from a pixel signal of the pixel array;
at least one first transfer controller configured to commonly control a light exposure for the m first sub-pixels; and
at least one second transfer controller configured to commonly control a light exposure for the n second sub-pixels.

9. The image sensor of claim 8 , wherein the first photodiode and the second photodiode have a same size.

10. The image sensor of claim 8 , wherein photocharges from the first photodiodes of the m first sub-pixels are summed in a floating diffusion area.

11. The image sensor of claim 8 , wherein if the image sensor captures an image corresponding to one frame, each of the pixels outputs a first pixel signal according to the m first sub-pixels and a second pixel signal according to the n second sub-pixels.

12. The image sensor of claim 11 , further comprising:
an image processor configured to process the first and second pixel signals to generate image data.

13. An image sensor, comprising:
a pixel circuit including a pixel, the pixel including,
a plurality of first light sensors configured to collect first photocharges, and
a plurality of second light sensors configured to collect second photocharges; and

a controller configured to generate a first control signal and a second control signal, the first control signal controlling a first exposure time period during which the first light sensors collect the first photocharges, the second control signal controlling a second exposure time period during which the second light sensors collect the second photocharges, the controller further configured to commonly control a light exposure with respect to the first light sensors for the first exposure time period, and commonly control a light exposure with respect to the second light sensors for the second exposure time period.

14. The image sensor of claim 13 , wherein the controller is configured to generate the first and second control signals such that the second exposure time period is less than the first exposure time period.

15. The image sensor of claim 13 , wherein a number of light sensors in the plurality of first light sensors is greater than a number of light sensors in the plurality of second light sensors.

16. The image sensor of claim 15 , wherein the controller is configured to generate the first and second control signals such that the first exposure time period is the same as the second exposure time period.

17. The image sensor of claim 13 , wherein the pixel circuit includes,
first switch circuitry configured to transfer the first photocharges to a node during a first read time period based on the first control signal, and
second switch circuitry configured to transfer the second photocharges to the node during a second read time period based on the second control signal.

18. The image sensor of claim 17 , wherein the pixel circuit includes,
reset circuitry configured to reset the node based on a reset signal, and
selection circuitry configured to output the transferred first and second photocharges based on a selection signal.

19. The image sensor of claim 18 , wherein the controller is configured to,
generate the selection signal such that the selection circuitry outputs the transferred first photocharges during the first read time period and outputs the transferred second photocharges during the second read time period, and
generate the reset signal such that the node is reset during a reset time period between the first read time period and the second read time period.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Ji-Won
• Lim Moo-Sup
• Kim Seung-Sik

Classifications

• H04N25/58

  involving two or more exposures · CPC title

• H04N23/667 Primary

  Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes · CPC title

• H04N25/68 Primary

  applied to defects · CPC title

• H04N25/778 Primary

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H04N25/585

  with pixels having different sensitivities within the sensor, e.g. fast or slow pixels or pixels having different sizes · CPC title