Femtowatt non-vacuum tube detector assembly

Patent metadata

Field	Value
Publication number	US-10014837-B2
Application number	US-201615299077-A
Country	US
Kind code	B2
Filing date	Oct 20, 2016
Priority date	Mar 15, 2013
Publication date	Jul 3, 2018
Grant date	Jul 3, 2018

Abstract

In one embodiment, a femtowatt sensitivity optical detector is provided using one or more photodiodes, intended as a replacement for the photomultiplier based photon counting unit.

First claim

What is claimed is:

1. A device comprising:
a plurality of photodiodes;
an analog amplification system comprising at least a high gain transimpedance amplifier (TIA) and at least a buffer on each of said photodiodes, followed by a fully differential amplifier to combine outputs of multiple TIAs;
a digital acquisition system comprising at least one analog-to-digital converter (ADC), followed by a programmable processor, which is linked to a central processor as well as on-board memory, wherein the programmable processor implements a data acquisition algorithm; and
at least one shaped reflector to direct light to at least one of said photodetectors, wherein the shaped reflector comprises at least one opening sized and positioned to allow a sample vessel to be placed at a desired location in a cavity defined at least in part by the shaped reflector.

2. The device of claim 1 further comprising a mechanical housing module of the analog amplification system.

3. The device of claim 1 further comprising multiple digital-to-analog converters (DACs) on the programmable processor configured to provide feedback control.

4. The device of claim 3 wherein one of said DACs is configured for offset adjustment in the differential amplifier, and one of said DACs is set the reference level of the ADC.

5. The device of claim 1 wherein the shaped reflector has a semi-hemispherical shape.

6. The device of claim 1 wherein the programmable processor implements the data acquisition algorithm using Butterworth filtering.

7. The device of claim 1 wherein the programmable processor implements the data acquisition algorithm using Kalman filtering.

8. The device of claim 1 wherein the programmable processor implements the data acquisition algorithm using Savitzky-Golay smoothing.

9. The device of claim 1 wherein the programmable processor implements the data acquisition algorithm using Kernel smoothing.

10. A device comprising:
a plurality of photodiodes;
an analog amplification system comprising at least a high gain transimpedance amplifier (TIA) and at least a buffer on each of said photodiodes, followed by a fully differential amplifier to combine outputs of multiple TIAs;
a digital acquisition system comprising at least one analog-to-digital converter (ADC), followed by a programmable processor, which is linked to a central processor as well as on-board memory, wherein the programmable processor implements a data acquisition algorithm; and
at least one shaped reflector to direct light to at least one of said photodetectors, wherein the shaped reflector comprises at least one opening sized and positioned to allow a sample vessel to be placed at a desired location in a cavity defined at least in part by the shaped reflector
wherein the programmable processor implements the data acquisition algorithm using a long time average.

11. The device of claim 10 further comprising a mechanical housing module for containing the analog amplification system.

12. The device of claim 10 further comprising multiple digital-to-analog converters (DACs) on the programmable processor configured to provide feedback control.

13. The device of claim 12 wherein one of said DACs is configured for offset adjustment in the differential amplifier, and one of said DACs is set the reference level of the ADC.

14. The device of claim 10 wherein the shaped reflector has a semi-hemispherical shape.

15. A device comprising:
a plurality of photodiodes;
an analog amplification system comprising at least a high gain transimpedance amplifier (TIA) and at least a buffer on each of said photodiodes, followed by a fully differential amplifier to combine outputs of multiple TIAs;
a digital acquisition system comprising at least one analog-to-digital converter (ADC), followed by a programmable processor, which is linked to a central processor as well as on-board memory, wherein the programmable processor implements a data acquisition algorithm; and
at least one shaped reflector to direct light to at least one of said photodetectors, wherein the shaped reflector comprises at least one opening sized and positioned to allow a sample vessel to be placed at a desired location in a cavity defined at least in part by the shaped reflector;
wherein the programmable processor implements the data acquisition algorithm using Laplacian smoothing.

16. The device of claim 15 further comprising a mechanical housing module containing the analog amplification system.

17. The device of claim 15 further comprising multiple digital-to-analog converters (DACs) on the programmable processor configured to provide feedback control.

18. The device of claim 17 wherein one of said DACs is configured for offset adjustment in the differential amplifier, and one of said DACs is set the reference level of the ADC.

19. The device of claim 15 wherein the shaped reflector has a semi-hemispherical shape.

Assignees

• Theranos Ip Co Llc

Inventors

• Mohan Karan
• Martinez Marcelo

Classifications

• H03G3/001 Primary

  Digital control of analog signals · CPC title

• H03M1/0607

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M1/1295) · CPC title

• H03F3/45071

  with semiconductor devices only · CPC title

• H03F3/08

  controlled by light · CPC title

• H10F77/953 Primary

  for devices having potential barriers · CPC title