Bi-directional multi-mode charge pump

US10014767B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10014767-B2
Application numberUS-201615081445-A
CountryUS
Kind codeB2
Filing dateMar 25, 2016
Priority dateMar 25, 2016
Publication dateJul 3, 2018
Grant dateJul 3, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Some embodiments include apparatus and methods using a charge pump coupled to a first supply power node and a second supply power node. The charge pump is arranged to transfer charge from the first supply power node to the second supply power node during a first time interval and to transfer charge from the second supply power node to the first supply power node during a second time interval.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a first supply power node; a second supply power node; and a charge pump coupled to the first and second supply power nodes to transfer charge from the first supply power node to the second supply power node during a first time interval and to transfer charge from the second supply power node to the first supply power node during a second time interval, further comprising a transistor having a first terminal directly coupled to the first supply power node and a second terminal directly coupled to the second supply power node, wherein the transistor is arranged to turn on during the first time interval and to turn off during the second time interval. 2. The apparatus of claim 1 , wherein the second supply power node is arranged to provide a supply voltage to a functional unit, and the charge pump is arranged to transfer charge from the second supply power node to the first supply power node when the functional unit changes from a higher power consumption state to a lower power consumption state. 3. The apparatus of claim 2 , wherein the charge pump is arranged to transfer charge from the first supply power node to the second supply power node when the functional unit exits the lower power consumption state. 4. The apparatus of claim 1 , wherein the charge pump includes a transistor to form a circuit path between the first and second supply power nodes when charge pump operation of the charge pump is disabled. 5. The apparatus of claim 1 , wherein the charge pump includes stages arranged to form a ring oscillator, each of the stages being arranged to transfer charge from the first supply power node to the second supply power node during the first time interval and to transfer charge from the second supply power node to the first supply power node during the second time interval. 6. The apparatus of claim 1 further comprising: a memory device; and a processor coupled to the memory device, one of the memory device and the processor including: the first supply power node; the second supply power node; and the charge pump coupled to the first and second supply power. 7. The system of claim 6 , further comprising a display coupled to the processor. 8. The system of claim 6 , further comprising an antenna coupled the processor.

Assignees

Inventors

Classifications

  • Ring oscillators · CPC title

  • Monitoring patterns of pulse trains (indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02) · CPC title

  • H02M3/07Primary

    using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

  • Control circuits allowing low power mode operation, e.g. in standby mode · CPC title

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Frequently asked questions

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What does patent US10014767B2 cover?
Some embodiments include apparatus and methods using a charge pump coupled to a first supply power node and a second supply power node. The charge pump is arranged to transfer charge from the first supply power node to the second supply power node during a first time interval and to transfer charge from the second supply power node to the first supply power node during a second time interval.
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H02M3/07. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 03 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).