System and method for providing an electron blocking layer with doping control

Patent metadata

Field	Value
Publication number	US-10014439-B2
Application number	US-201615215968-A
Country	US
Kind code	B2
Filing date	Jul 21, 2016
Priority date	Aug 16, 2013
Publication date	Jul 3, 2018
Grant date	Jul 3, 2018

Abstract

Aspects of the disclosure pertain to a system and method for providing an electron blocking layer with doping control. The electron blocking layer is included in a semiconductor assembly. The electron blocking layer includes a lithium aluminate layer. The lithium aluminate layer promotes reduced diffusion of magnesium into a layer stack of the semiconductor assembly.

First claim

What is claimed is:

1. A semiconductor assembly, comprising:
a layer stack, wherein the layer stack is an active layer; and
an electron blocking layer formed upon the layer stack; and
a lithium aluminate layer that inhibits diffusion of magnesium into the layer stack by separating the layer stack from a magnesium-doped layer.

2. The semiconductor assembly of claim 1 , wherein the layer stack includes a substrate.

3. The semiconductor assembly of claim 2 , wherein the layer stack includes a cladding layer, the cladding layer being formed upon the substrate.

4. The semiconductor assembly of claim 3 , wherein the layer stack includes one or more barrier layers, a first barrier layer included in the one or more barrier layers being formed upon the cladding layer.

5. The semiconductor assembly of claim 4 , wherein the layer stack includes one or more quantum well layers, a quantum well layer included in the one or more quantum well layers being formed upon the first barrier layer.

6. The semiconductor assembly of claim 5 , wherein the lithium aluminate layer is patterned.

7. The semiconductor assembly of claim 6 , wherein the patterned layer of lithium aluminate forms uniformly-spaced stripes or islands of lithium aluminate.

8. The semiconductor assembly of claim 6 , wherein the patterned lithium aluminate layer is formed upon an aluminum nitride layer, the aluminum nitride layer being formed upon a second barrier layer included in the one or more barrier layers, the second barrier layer being formed upon the quantum well layer.

9. The semiconductor assembly of claim 6 , wherein the patterned lithium aluminate layer forms multiple rows of interleaved islands.

10. The semiconductor assembly of claim 9 , wherein the patterned lithium aluminate layer is formed upon an aluminum nitride layer, the aluminum nitride layer being formed upon a second barrier layer included in the one or more barrier layers, the second barrier layer being formed upon the quantum well layer.

11. The semiconductor assembly of claim 5 , wherein the lithium aluminate layer is formed directly upon a second barrier layer included in the one or more barrier layers, the second barrier layer being formed upon the quantum well layer.

12. The semiconductor assembly of claim 5 , wherein a gallium nitride layer is formed upon the electron blocking layer.

13. The semiconductor assembly of claim 1 , wherein the layer stack is formed upon a lithium aluminate substrate.

14. A semiconductor assembly, comprising:
a layer stack; and
an electron blocking layer formed upon the layer stack; and
a lithium aluminate layer that inhibits diffusion of magnesium into the layer stack by separating the layer stack from a magnesium-doped layer, wherein the electron blocking layer comprises the lithium aluminate layer and the magnesium-doped layer.

15. An assembly, comprising:
a layer stack, the layer stack including a cladding layer and one or more barrier layers, a first barrier layer included in the one or more barrier layers being formed upon the cladding layer, the layer stack further including one or more quantum well layers, a quantum well layer included in the one or more quantum well layers being formed upon the first barrier layer;
an electron blocking layer formed upon the layer stack; and
a lithium aluminate layer that at least partially blocks diffusion of magnesium into the layer stack by its physical position being between the layer stack and a source of magnesium.

16. The assembly of claim 15 , wherein the layer stack is formed upon a lithium aluminate substrate.

17. The assembly as claimed in claim 16 , wherein the cladding layer is a silicon-doped gallium nitride cladding layer.

18. The assembly as claimed in claim 17 , wherein the one or more barrier layers are silicon-doped gallium nitride barrier layers.

19. The assembly as claimed in claim 18 , wherein the one or more quantum well layers are silicon-doped indium gallium nitride quantum well layers.

20. The assembly as claimed in claim 15 , wherein the source of magnesium comprises a magnesium-doped layer, wherein the electron blocking layer comprises the magnesium-doped layer and the lithium aluminate layer, and wherein the lithium aluminate layer is positioned between the magnesium-doped layer and the layer stack.

Assignees

• Avago Technologies General Ip

Inventors

• Freund Joseph M
• Delucca John M

Classifications

• H10P32/15

  from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping · CPC title

• H10P14/3444

  P-type · CPC title

• H10P14/3442

  N-type · CPC title

• H10P14/3416

  Nitrides · CPC title

• H10P14/3256

  Microstructure · CPC title