Chalcogen back surface field layer

Patent metadata

Field	Value
Publication number	US-10014423-B2
Application number	US-201615281789-A
Country	US
Kind code	B2
Filing date	Sep 30, 2016
Priority date	Sep 30, 2016
Publication date	Jul 3, 2018
Grant date	Jul 3, 2018

Abstract

Kesterite photovoltaic devices having a back surface field layer are provided. In one aspect, a method of forming a photovoltaic device includes: forming a complete photovoltaic device having a substrate, an electrically conductive layer on the substrate, an absorber layer on the electrically conductive layer, a buffer layer on the absorber layer, and a transparent front contact on the buffer layer; removing the substrate and the electrically conductive layer from the complete photovoltaic device to expose a backside surface of the absorber layer; forming a passivating layer on the backside surface of the absorber layer; and forming a high work function back contact on the passivating layer. A photovoltaic device having a passivating layer is also provided.

First claim

What is claimed is:

1. A method of forming a photovoltaic device, the method comprising:
forming a complete photovoltaic device having a substrate, an electrically conductive layer on the substrate, an absorber layer on the electrically conductive layer, a buffer layer on the absorber layer, and a transparent front contact on the buffer layer;
removing the substrate and the electrically conductive layer from the complete photovoltaic device to expose a backside surface of the absorber layer;
forming a passivating layer on the backside surface of the absorber layer, wherein the passivating layer comprises a material selected from the group consisting of: pure selenium, pure sulfur, and pure tellurium; and
forming a high work function back contact on the passivating layer.

2. The method of claim 1 , wherein the substrate is selected from the group consisting of: a glass substrate, a ceramic substrate, a metal foil substrate, and a plastic substrate.

3. The method of claim 1 , wherein the electrically conductive layer comprises a material selected from the group consisting of: molybdenum, molybdenum trioxide, gold, nickel, tantalum, tungsten, aluminum, platinum, titanium nitride, silicon nitride, and combinations thereof.

4. The method of claim 1 , wherein the absorber layer comprises a kesterite material.

5. The method of claim 4 , wherein the absorber layer comprises copper, zinc, tin, and at least one of sulfur and selenium.

6. The method of claim 1 , wherein the absorber layer has a thickness of from about 0.5 micrometers to about 2 micrometers, and ranges therebetween.

7. The method of claim 1 , wherein the buffer layer comprises a material selected from the group consisting of: cadmium sulfide, cadmium-zinc-sulfur, indium sulfide, zinc oxide, zinc oxysulfide, aluminum oxide, and combinations thereof.

8. The method of claim 1 , wherein the transparent front contact comprises a transparent conductive oxide selected from the group consisting of: indium-tin-oxide, aluminum-doped zinc oxide, and combinations thereof.

9. The method of claim 1 , wherein the substrate and the electrically conductive layer are removed from the complete photovoltaic device using exfoliation.

10. The method of claim 1 , wherein the high work function back contact comprises a material selected from the group consisting of: molybdenum, molybdenum trioxide, gold, nickel, tantalum, tungsten, aluminum, platinum, titanium nitride, silicon nitride, and combinations thereof.

11. The method of claim 1 , wherein the high work function back contact comprises molybdenum trioxide and gold.

12. The method of claim 1 , wherein the forming of the complete photovoltaic device further comprises:
forming a metal grid on the transparent front contact.

13. The method of claim 1 , wherein the metal grid comprises a material selected from the group consisting of: nickel, aluminum, and combinations thereof.

14. The method of claim 1 , wherein the forming of the complete photovoltaic device comprises:
forming the electrically conductive layer on the substrate;
forming the absorber layer on the electrically conductive layer;
annealing the absorber layer;
forming the buffer layer on the absorber layer; and
forming the transparent front contact on the buffer layer.

15. The method of claim 14 , wherein the absorber layer is annealed at a temperature of from about 400° C. to about 800° C., and ranges therebetween.

Assignees

• IBM

Inventors

• Antunez Priscilla D
• Ek Bruce A
• Haight Richard A
• Mankad Ravin
• Singh Saurabh
• Todorov Teodor K

Classifications

• H01L31/0326 Primary

  Electricity · mapped topic

• H01L31/1868

  Electricity · mapped topic

• H01L31/072

  Electricity · mapped topic

• H01L31/1884

  Electricity · mapped topic

• H01L31/022441

  Electricity · mapped topic