Methods of forming patterns with multiple layers for semiconductor devices

Patent metadata

Field	Value
Publication number	US-10014181-B2
Application number	US-201615215152-A
Country	US
Kind code	B2
Filing date	Jul 20, 2016
Priority date	Oct 29, 2015
Publication date	Jul 3, 2018
Grant date	Jul 3, 2018

Abstract

Methods of forming patterns for semiconductor devices are provided. A method may include preparing a substrate including an etch target layer on a surface of the substrate; forming a mask pattern that includes a lower masking layer having a first density and an upper masking layer having a second density that is less than the first density, on the etch target layer; forming spacers that cover sidewalls of the lower masking layer and the upper masking layer; removing the mask pattern; and etching the etch target layer by using the spacers as an etching mask.

First claim

What is claimed is:

1. A method of forming patterns for a semiconductor device, the method comprising:
preparing a substrate comprising an etch target layer on a surface of the substrate;
forming a mask pattern that comprises a lower masking layer having a first density and an upper masking layer having a second density that is less than the first density, on the etch target layer;
forming spacers that cover sidewalls of the lower masking layer and the upper masking layer;
removing the mask pattern; and
etching the etch target layer by using the spacers as an etching mask,
wherein the forming of the mask pattern comprises forming the lower masking layer, wherein a thickness of the lower masking layer in a direction that is perpendicular to the surface of the substrate is from about ⅓ to about ½ of a total thickness of the mask pattern in the direction that is perpendicular to the surface of the substrate.

2. The method of claim 1 ,
wherein the first density of the lower masking layer is equal to or greater than about 2 g/cm 3 and is smaller than or equal to about 3.9 g/cm 3 , and
wherein the second density of the upper masking layer is equal to or greater than about 1 g/cm 3 and is smaller than or equal to about 2 g/cm 3 .

3. The method of claim 1 ,
wherein the lower masking layer comprises a silicon nitride film, and
wherein the upper masking layer comprises a carbon-containing film.

4. The method of claim 3 , wherein the forming of the mask pattern comprises forming the lower masking layer at a process temperature equal to or higher than room temperature and smaller than or equal to about 400° C. using an atomic layer deposition (ALD) process.

5. The method of claim 3 , wherein the forming of the mask pattern comprises forming the upper masking layer using a chemical vapour deposition (CVD) process.

6. The method of claim 1 , wherein the removing of the mask pattern comprises:
a first etching operation comprising etching the upper masking layer; and
a second etching operation comprising etching the lower masking layer.

7. The method of claim 6 , wherein the first etching operation comprises dry etching the upper masking layer.

8. The method of claim 6 , wherein the second etching operation comprises wet etching the lower masking layer.

9. The method of claim 1 , wherein the forming of the spacers comprises forming metal oxide films.

10. The method of claim 1 , wherein the forming of the spacers comprises forming the spacers at a process temperature equal to or higher than room temperature and smaller than or equal to about 400° C., by using an atomic layer deposition (ALD) process.

11. The method of claim 1 ,
wherein, in the preparing of the substrate, the etch target layer comprises a plurality of layers, at least one of the plurality of layers being a carbon-containing layer.

12. The method of claim 1 , wherein the mask pattern further comprises a middle masking layer between the lower masking layer and the upper masking layer, the middle masking layer having a third density that is between the first density of the lower masking layer and the second density of the upper masking layer.

13. A method of forming patterns for a semiconductor device, the method comprising:
preparing a substrate comprising an etch target layer on a surface of the substrate;
forming a mask pattern comprising a plurality of layers that are sequentially formed on the etch target layer, ones of the plurality of layers comprising N masking layers stacked on each other in order of decreasing density, N being a natural number greater than or equal to 3;
forming spacers that cover sidewalls of the plurality of layers of the mask pattern;
sequentially removing the plurality of layers of the mask pattern;
anisotropically etching the etch target layer using the spacers as an etching mask; and
removing a residue of the spacers remaining after the anisotropically etching.

14. The method of claim 13 , wherein the forming of the mask pattern comprises:
forming a lower first masking layer of the N masking layers, the lower first masking layer having a first density;
forming a second masking layer of the N masking layers, the second masking layer being stacked on the lower first masking layer and having a second density that is lower than the first density; and
forming a third masking layer of the N masking layers, the third masking layer being stacked on the second masking layer and having a third density that is lower than the second density,
wherein the forming the lower first masking layer comprises forming a silicon nitride film,
wherein the forming the second masking layer comprises forming a silicon oxide film, and
wherein the forming the third masking layer comprises forming a carbon-containing film.

15. A method of forming etched patterns on a surface of a substrate, comprising:
forming an etch target layer on the surface of the substrate;
forming a plurality of masking layers on the etch target layer, the plurality of masking layers comprising a first masking layer adjacent the etch target layer and comprising a first density, and a second masking layer on the first masking layer and comprising a second density that is less than the first density;
etching the plurality of masking layers to form a plurality of mask patterns;
forming spacers that cover sidewalls of the mask patterns;
removing the mask patterns;
etching the etch target layer using the spacers as an etching mask; and
removing portions of the spacers remaining after etching the etch target layer,
wherein the first masking layer comprises a thickness in a first direction that is perpendicular to the surface of the substrate that is between about ⅓ and about ½ of a total thickness of the plurality of masking layers in the first direction.

16. The method of claim 15 ,
wherein the thickness of the first masking layer in the first direction is about ½ of the total thickness of the plurality of masking layers in the first direction, and
wherein the second masking layer comprises a thickness in the first direction that is about ½ of the total thickness of the plurality of masking layers in the first direction.

17. The method of claim 15 ,
wherein the thickness of the first masking layer in the first direction is about ⅓ of the total thickness of the plurality of masking layers in the first direction, and
wherein the second masking layer comprises a thickness in the first direction that is about ⅔ of the total thickness of the plurality of masking layers in the first direction.

18. The method of claim 15 ,
wherein the plurality of masking layers comprises at least three masking layers sequentially stacked in order of decreasing density with the first masking layer adjacent the etch target layer comprising the highest density and an upper masking layer furthest from the etch target layer comprising the lowest density.

19. The method of claim 15 ,
wherein the forming the spacers comprises conformally forming a spacer layer on the mask patterns and anisotropically etching the spacer layer,
wherein the anisotropically etching the spacer layer removes at least a portion of an uppermost one of the plurality of masking layers that is furthest from the etch target layer, and
wherein the removing the mask patterns comprises sequentially removing remaining ones of the plurality of mask layers.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Jun-Soo
• Kim Hong-Rae
• Lee Jeon-Il

Classifications

• H10P76/4085 Primary

  characterised by the processes involved to create the masks · CPC title

• H10P50/695

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6902

  composed of carbon, e.g. alpha-C, diamond or hydrogen doped carbon · CPC title