Low power tunable reference voltage generator

US10013006B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10013006-B2
Application numberUS-201214342189-A
CountryUS
Kind codeB2
Filing dateJun 29, 2012
Priority dateJul 3, 2011
Publication dateJul 3, 2018
Grant dateJul 3, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A method and apparatus for generating an improved reference voltage for use, for example, in a system requiring accurate low power operation. In particular, our reference voltage generator is adapted to output VREF as a function of the voltage difference between V1 and V2. The reference voltage generator is further adapted to include our reference voltage tuner to compensate for predetermined sensitivities of the reference voltage VREF, and to adjust the absolute value of VREF. During manufacturing and system test, a driver may be used to drive a buffered or unbuffered version of VREF to off-chip test functionality. Also, a configuration memory may be used to store the trim settings during normal operation, and make such settings available to outside resources.

First claim

Opening claim text (preview).

What we claim is: 1. A tunable reference voltage generator comprising: a reference voltage generator adapted to develop a first reference voltage, said reference voltage generator comprising a sensitivity tuner adapted selectively to tune said first reference voltage to adjust for a predetermined sensitivity of said first reference voltage; and a variable gain amplifier, coupled to said reference voltage generator, adapted to receive said first reference voltage and to develop a second reference voltage as a predetermined function of said first reference voltage. 2. The tunable reference voltage generator of claim 1 wherein the sensitivity tuner is further characterized as comprising a programmable plurality of binary weighted transistors. 3. The tunable reference voltage generator of claim 1 wherein the reference voltage generator is further characterized as comprising: a first transistor, biased to operate in a subthreshold region; and a second transistor biased to operate in a subthreshold region, coupled in series with said first transistor so as to develop said first reference voltage on an electrode common to said first transistor and said second transistor. 4. The tunable reference voltage generator of claim 1 wherein the reference voltage generator is further characterized as comprising: a first transistor biased to operate in a subthreshold region; a second transistor biased to operate in a subthreshold region, coupled in series with said first resistor so as to develop a first reference voltage on an electrode common to said first transistor and said second transistor; a third transistor biased to operate in a subthreshold region; a fourth transistor biased to operate in a subthreshold region, coupled in series with said third resistor so as to develop a second reference voltage on an electrode common to said third resistor and said fourth resistor; and a difference amplifier adapted to develop the second reference voltage as a function of a voltage difference between the first reference voltage and the second reference voltage. 5. The tunable reference voltage generator of claim 1 wherein the reference voltage generator is further characterized as a bandgap voltage reference generator adapted to provide said first reference voltage. 6. The tunable reference voltage generator of claim 1 wherein the variable gain amplifier is further characterized as comprising: a difference amplifier adapted to: receive said first reference voltage and a function of said second reference voltage; and develop a difference voltage as a function of a voltage difference between said first reference voltage and a function of said second reference voltage; and a voltage divider adapted to: receive the difference voltage; and develop said second reference voltage as a function of the difference voltage. 7. The tunable reference voltage generator of claim 6 wherein the voltage divider is further characterized as comprising a variable divider coupled in series with a fixed divider, said variable divider adapted selectively to tune an absolute value of said second reference voltage. 8. The tunable reference voltage generator of claim 7 wherein the variable divider is further characterized as comprising a programmable plurality of transistors, each biased in the subthreshold region and coupled in series with each other in a diode stack topology. 9. A method for tuning a reference voltage, the method comprising the steps of: (1) developing a first reference voltage comprising: (1A) tuning said first reference voltage to adjust for a predetermined sensitivity of said first reference voltage; and (2) developing a second reference voltage as a predetermined function of said first reference voltage. 10. The method of claim 9 further characterized as: (1A1) programming a resistance, said resistance selected from a plurality of binary weighted increments; and (1A2) tuning said first reference voltage, as a function of said programmed resistance, to adjust for a predetermined sensitivity of said first reference voltage. 11. The method of claim 9 wherein step (2) is characterized as: (2A) developing a difference voltage as a function of a voltage difference between said first reference voltage and a function of said second reference voltage; and (2B) developing said second reference voltage as a function of the difference voltage. 12. The method of claim 9 further characterized as: (3) tuning said second reference voltage, as a function of a programmed resistance and a fixed resistance, to adjust for a predetermined sensitivity of said second reference voltage. 13. The method of claim 12 wherein said programmed resistance is further characterized as a function of a selected sum of forward biased diode voltage drops.

Assignees

Inventors

Classifications

  • wherein the variable is DC · CPC title

  • G05F1/462Primary

    as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic · CPC title

  • comprising pulse shaping or differentiating circuits · CPC title

  • using field-effect transistors only · CPC title

  • Clock generators with changeable or programmable clock frequency · CPC title

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What does patent US10013006B2 cover?
A method and apparatus for generating an improved reference voltage for use, for example, in a system requiring accurate low power operation. In particular, our reference voltage generator is adapted to output VREF as a function of the voltage difference between V1 and V2. The reference voltage generator is further adapted to include our reference voltage tuner to compensate for predetermined s…
Who is the assignee on this patent?
Hanson Scott, Ifesinachukwu Kenneth Gozie, Kanji Ajaykumar A, and 1 more
What technology area does this patent fall under?
Primary CPC classification G05F1/462. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 03 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).