Soundwire XL turnaround signaling

Patent metadata

Field	Value
Publication number	US-10003456-B2
Application number	US-201715430134-A
Country	US
Kind code	B2
Filing date	Feb 10, 2017
Priority date	Feb 26, 2016
Publication date	Jun 19, 2018
Grant date	Jun 19, 2018

Abstract

System, methods and apparatus are described that improve link turnaround performance in a differentially driven link. A method performed at a first device coupled to a two-wire serial link includes transmitting from the first device first differentially-encoded data to a second device over the two-wire serial link during a first time period, receiving at the first device second differentially-encoded data from the second device over the two-wire serial link during a second time period, and driving by the first device both wires of the two-wire serial link to a common voltage level during a third time period, the third time period spanning a link turnaround period between the first time period and the second time period. Both wires of the two-wire serial link are driven toward the common voltage level by the second device during the third time period.

First claim

What is claimed is:

1. A method performed at a first device coupled to a two-wire serial link, comprising:
transmitting from a first device first differentially-encoded data to a second device over the two-wire serial link during a first time period;
receiving at the first device second differentially-encoded data from the second device over the two-wire serial link during a second time period; and
driving by the first device the two-wire serial link to a common signaling state for a third time period that includes at least a portion of a link turnaround period that separates the first time period and the second time period,
wherein the two-wire serial link is driven to the common signaling state by the second device for at least a portion of the third time period.

2. The method of claim 1 , wherein the first device drives both wires of the two-wire serial link to a common voltage level during the third time period and until the second time period has commenced.

3. The method of claim 1 , further comprising:
disabling differential line drivers of the first device when the third time period has elapsed.

4. The method of claim 1 , wherein the first device comprises a master device that controls communications over the two-wire serial link.

5. The method of claim 1 , wherein the first device comprises a slave device that responds to commands received from a master device through the two-wire serial link.

6. The method of claim 5 , wherein the third time period includes the link turnaround period and a portion of the second time period.

7. The method of claim 1 , wherein both wires of the two-wire serial link are driven throughout the link turnaround period.

8. The method of claim 1 , wherein driving the two-wire serial link to a common signaling state includes:
driving both wires of the two-wire serial link toward a common voltage that corresponds to a ground voltage of the first device.

9. The method of claim 1 , wherein the first differentially-encoded data is transmitted in accordance with a SoundWire XL protocol.

10. An apparatus comprising:
a physical interface coupled to a two-wire link and configured to transmit and receive differentially-encoded data over the two-wire link; and
a processor or controller configured to:
transmit first data to a device through the physical interface during a first time period;
receive second data from the device through the physical interface during a second time period that follows a link turnaround period; and
cause the physical interface to drive the two-wire link to a common signaling state during a third time period that includes at least a portion of the link turnaround period,

wherein the two-wire link is driven by the device during at least a portion of the third time period.

11. The apparatus of claim 10 , wherein the processor or controller is configured to:
cause the physical interface to drive both wires of the two-wire link to a common voltage level during the third time period and until the second time period has commenced.

12. The apparatus of claim 10 , wherein the processor or controller is configured to:
cause differential line drivers of the physical interface to be disabled when the third time period has elapsed.

13. The apparatus of claim 10 , wherein the apparatus is adapted to operate as a master device that controls communications over the two-wire link.

14. The apparatus of claim 10 , wherein the apparatus is adapted to operate as a slave device that responds to commands received from a master device through the two-wire link.

15. The apparatus of claim 10 , wherein the third time period includes the link turnaround period and a portion of the second time period.

16. The apparatus of claim 15 , wherein both wires of the two-wire link are driven throughout the link turnaround period.

17. The apparatus of claim 10 , wherein the processor or controller is configured to:
drive both wires of the two-wire link toward a common voltage that corresponds to a ground voltage of the first device.

18. The apparatus of claim 10 , further comprising:
an encoder configured to encode the first data in accordance with a SoundWire XL protocol.

19. An apparatus, comprising:
a two-wire serial link;
a master device coupled to the two-wire serial link; and
a slave device coupled to the two-wire serial link,
wherein the master device is configured to:
transmit first differentially-encoded data to the slave device over the two-wire serial link during a first time period;
disable differential line drivers of the master device during a second time period; and
drive the two-wire serial link to a common signaling state during a third time period that includes at least a portion of a link turnaround period between the first time period and the second time period, and

wherein the slave device is configured to:
transmit second differentially-encoded data to the master device over the two-wire serial link during the second time period;
drive the two-wire serial link to the common signaling state during a fourth time period that includes at least a portion of the link turnaround period; and
disable differential line drivers of the slave device during the first time period.

20. The apparatus of claim 19 , wherein the first time period follows the second time period, and wherein the slave device is configured to:
drive the two-wire serial link to the common signaling state during the fourth time period that includes the link turnaround period and a portion of the second time period.

21. The apparatus of claim 20 , wherein the slave device is configured to disable differential line drivers of the slave device during the fourth time period, and wherein the master device is configured to disable differential line drivers of the master device during the third time period.

22. The apparatus of claim 19 , wherein the two-wire serial link is driven to the common signaling state when both wires of the two-wire serial link are driven to a common voltage level.

23. The apparatus of claim 19 , wherein the two-wire serial link is operated in accordance with SoundWire XL specifications.

24. An apparatus comprising:
means for transmitting from a first device, first differentially-encoded data to a second device over a two-wire serial link during a first time period;
means for receiving at the first device, second differentially-encoded data from the second device over the two-wire serial link during a second time period; and
means for driving the two-wire serial link to a common signaling state for a third time period that includes at least a portion of a link turnaround period that separates the first time period and the second time period,
wherein the two-wire serial link is driven to the common signaling state by the second device for at least a portion of the third time period.

25. The apparatus of claim 24 , wherein the means for transmitting from the first device is configured to drive both wires of the two-wire serial link to a common voltage level until the second time period has commenced.

26. The apparatus of claim 24 , wherein the means for transmitting from the first device is configured to disable differential line drivers of the first device when the third time period has elapsed.

27. The apparatus of claim 24 , wherein the first device is configured to operate as a master device that controls communi

Assignees

• Qualcomm Inc

Inventors

• Wang Jin-Sheng
• Amarilio Lior

Classifications

• H04L25/493

  by transition coding, i.e. the time-position or direction of a transition being encoded before transmission · CPC title

• G06F13/4291

  using a clocked protocol · CPC title

• H04R3/00

  Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F) · CPC title

• H04L5/16 Primary

  Half-duplex systems; Simplex/duplex switching; Transmission of break signals {non-automatically inverting the direction of transmission} · CPC title

• H04L7/04 Primary

  Speed or phase control by synchronisation signals {(H04L7/0075 takes precedence)} · CPC title