Terminator and termination method

Patent metadata

Field	Value
Publication number	US-10003115-B2
Application number	US-201615374143-A
Country	US
Kind code	B2
Filing date	Dec 9, 2016
Priority date	Dec 17, 2015
Publication date	Jun 19, 2018
Grant date	Jun 19, 2018

Abstract

A terminator has an upper dielectric layer provided on an upper broad wall of a post-wall waveguide, and a microstrip line (MSL) provided on the upper dielectric layer. A blind via has one end thereof connected with one end of the MSL and is inserted inside the post-wall waveguide. A chip resistor has one end thereof connected with the other end of the MSL and has the other end thereof connected with the upper broad wall.

First claim

The invention claimed is:

1. A terminator comprising:
a post wall constituted by a plurality of conductor posts; and
a pair of broad walls which, together with the post wall, form a waveguide region, one of the pair of broad walls being provided with a microstrip line on a surface thereof via a dielectric layer;

a blind via connected with one end of the microstrip line and inserted inside the waveguide region; and
a resistor having one end thereof connected with the other end of the microstrip line and having the other end thereof connected with the one of the pair of broad walls.

2. The terminator as set forth in claim 1 , wherein, when viewed from above, the resistor is contained within a region surrounded by the post wall.

3. The terminator as set forth in claim 1 , wherein, when viewed from above, the resistor extends across the post wall from the region surrounded by the post wall to an outside of the region.

4. The terminator as set forth in claim 1 , further comprising an attenuation layer provided between the resistor and the one of the pair of broad walls, the attenuation layer being made of a material containing a dielectric.

5. The terminator as set forth in claim 4 , wherein the attenuation layer is an anisotropic conductive film made of (i) a resin which is the dielectric and (ii) conductive particles dispersed in the resin.

6. The terminator as set forth in claim 1 , wherein the microstrip line is provided with an impedance matching section.

7. The terminator as set forth in claim 6 , wherein:
the impedance matching section has a coil section and a capacitance section connected with an end of the coil section, the capacitance section being constituted by an open stub; and
a connection section of the capacitance section where the capacitance section is connected with the coil section is a connection section of the impedance matching section where the impedance matching section is connected with the microstrip line.

8. The terminator as set forth in claim 7 , wherein the capacitance section is connected only with one end of the coil section in the impedance matching section.

9. The terminator as set forth in claim 7 , wherein the capacitance section is connected with each of both ends of the coil section in the impedance matching section.

10. The terminator as set forth in claim 7 , wherein sets each consisting of the coil section and the capacitance section are provided in multiple stages and connected with each other in the impedance matching section.

11. The terminator as set forth in claim 7 , wherein:
the coil section of the impedance matching section has, between one end and the other end of the coil section, a meandering shape which meanders toward one side and the other side of a direction perpendicular to a straight line that connects between the one end and the other end; and
the capacitance section has a linear section extending from an end of the coil section in the direction perpendicular to the straight line.

12. The terminator as set forth in claim 11 , wherein the capacitance section has a bent section which bends from a termination section of the linear section so as to extend along a meandering-shaped region of the coil section.

13. A termination method comprising the steps of:
providing a microstrip line, via a dielectric layer, on a surface of one of a pair of broad walls of a post-wall waveguide,
the post-wall waveguide including:
a post wall constituted by a plurality of conductor posts; and
the pair of broad walls which, together with the post wall, form a waveguide region;
providing a blind via which is connected with one end of the microstrip line and inserted inside the waveguide region; and
providing a resistor which has one end thereof connected with the other end of the microstrip line and has the other end thereof connected with the one of the pair of broad walls.

Assignees

• Fujikura Ltd

Inventors

• Uemichi Yusuke

Classifications

• H03H7/383

  comprising distributed impedance elements together with lumped impedance elements · CPC title

• H01P5/107

  Hollow-waveguide/strip-line transitions · CPC title

• H01P1/268 Primary

  Strip line terminations (H01P1/262 takes precedence) · CPC title

• H01P11/001

  Manufacturing waveguides or transmission lines of the waveguide type · CPC title

• H03H7/24

  Frequency- independent attenuators · CPC title