Partitioning a large circuit model for signal electromigration analysis
US-10769330-B1 · Sep 8, 2020 · US
This page is not indexed by search engines while we improve data quality.
Thomas Ajish patents
Thomas Ajish is listed as an inventor on 4 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Thomas Ajish |
| Total patents | 4 |
| First publication | Jan 15, 2019 |
| Latest publication | Sep 8, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
Exhaustive input vector stimuli for signal electromigration analysis
US-10235482-B1 · Mar 19, 2019 · US
Pseudo-inverter configuration for signal electromigration analysis
US-10192012-B1 · Jan 29, 2019 · US
Scheduling parallel processing of multiple partitions for signal electromigration analysis
US-10181000-B1 · Jan 15, 2019 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Cadence Design Systems Inc | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F30/367 | 4 |
| G06F30/398 | 3 |
| G06F30/33 | 3 |
| G06F17/5036 | 3 |
| G06F17/5081 | 3 |