Post-silicon validation and debug using symbolic quick error detection
US-10528448-B2 · Jan 7, 2020 · US
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Singh Eshan patents
Singh Eshan is listed as an inventor on 2 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Singh Eshan |
| Total patents | 2 |
| First publication | Jun 7, 2018 |
| Latest publication | Jan 7, 2020 |
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Univ Leland Stanford Junior | 2 |
| Univ New York | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F11/2236 | 2 |
| G06F11/3003 | 2 |
| G06F11/3079 | 2 |
| G06F11/3024 | 2 |
| G06F11/3466 | 2 |