Tile based interleaving and de-interleaving for digital signal processing
US-11755474-B2 · Sep 12, 2023 · US
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Murrin Paul patents
Murrin Paul is listed as an inventor on 38 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Murrin Paul |
| Total patents | 38 |
| First publication | Mar 17, 2015 |
| Latest publication | Sep 12, 2023 |
Notable patents
Publications ranked by popularity score, then publication date.
Tile based interleaving and de-interleaving for digital signal processing
US-2022075723-A1 · Mar 10, 2022 · US
Tile based interleaving and de-interleaving for digital signal processing
US-11210217-B2 · Dec 28, 2021 · US
Dynamic scaling of channel state information
US-11184110-B2 · Nov 23, 2021 · US
Systems and methods for adjusting the sample timing of a GFSK modulated signal
US-11044128-B2 · Jun 22, 2021 · US
Dynamic Scaling of Channel State Information
US-2021050942-A1 · Feb 18, 2021 · US
Dynamic scaling of channel state information
US-10862624-B2 · Dec 8, 2020 · US
Systems and Methods for Adjusting the Sample Timing of a GFSK Modulated Signal
US-2020336346-A1 · Oct 22, 2020 · US
GFSK detector
US-10756935-B2 · Aug 25, 2020 · US
Systems and methods for adjusting the sample timing of a GFSK modulated signal
US-10742460-B2 · Aug 11, 2020 · US
Recent patents
Latest publications not already listed above.
Tile based interleaving and de-interleaving for digital signal processing
US-2020242029-A1 · Jul 30, 2020 · US
Tile based interleaving and de-interleaving for digital signal processing
US-10657050-B2 · May 19, 2020 · US
GFSK Detector
US-2020067742-A1 · Feb 27, 2020 · US
Systems and Methods for Adjusting the Sample Timing of a GFSK Modulated Signal
US-2020067741-A1 · Feb 27, 2020 · US
Dynamic Scaling of Channel State Information
US-2020007273-A1 · Jan 2, 2020 · US
Controlling register bank access between program and dedicated processors in a processing system
US-10387155-B2 · Aug 20, 2019 · US
Tile based interleaving and de-interleaving for digital signal processing
US-2019236006-A1 · Aug 1, 2019 · US
Tile based interleaving and de-interleaving for digital signal processing
US-10296456-B2 · May 21, 2019 · US
Logging events with timestamps
US-10255161-B2 · Apr 9, 2019 · US
Minimizing inter-symbol interference in OFDM signals
US-10142154-B2 · Nov 27, 2018 · US
Determining signal channel impulse response using subcarrier pilot signals
US-10050811-B2 · Aug 14, 2018 · US
Minimizing inter-symbol interference in ofdm signals
US-2018205588-A1 · Jul 19, 2018 · US
Minimizing inter-symbol interference in OFDM signals
US-9954713-B2 · Apr 24, 2018 · US
Sampling frequency offset calculation
US-9831975-B2 · Nov 28, 2017 · US
Efficient demapping of constellations
US-9819528-B2 · Nov 14, 2017 · US
Impulsive noise rejection
US-9660677-B2 · May 23, 2017 · US
Minimizing inter-symbol interference in ofdm signals
US-2016359656-A1 · Dec 8, 2016 · US
Sampling frequency offset calculation
US-2016359579-A1 · Dec 8, 2016 · US
Efficient Demapping of Constellations
US-2016294597-A1 · Oct 6, 2016 · US
Logging events with timestamps
US-2016283312-A1 · Sep 29, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Imagination Tech Ltd | 38 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L27/2647 | 14 |
| H04L1/0054 | 11 |
| H03M13/41 | 11 |
| H04L1/0047 | 10 |
| H04L27/38 | 9 |