Methods for etching a metal layer to form an interconnection structure for semiconductor applications
US-9960052-B2 · May 1, 2018 · US
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Kuo Chiu-Pien patents
Kuo Chiu-Pien is listed as an inventor on 6 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Kuo Chiu-Pien |
| Total patents | 6 |
| First publication | Oct 8, 2015 |
| Latest publication | May 1, 2018 |
Notable patents
Publications ranked by popularity score, then publication date.
Methods for etching a hardmask layer for an interconnection structure for semiconductor applications
US-9653320-B2 · May 16, 2017 · US
Methods for etching a barrier layer for an interconnection structure for semiconductor applications
US-2016099173-A1 · Apr 7, 2016 · US
Methods for etching a hardmask layer for an interconnection structure for semiconductor applications
US-2016079077-A1 · Mar 17, 2016 · US
Method for etching a hardmask layer for an interconnection structure for semiconductor applications
US-2016079088-A1 · Mar 17, 2016 · US
Methods for etching a metal layer to form an interconnection structure for semiconductor appilcations
US-2015287634-A1 · Oct 8, 2015 · US
Recent patents
Latest publications not already listed above.
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Applied Materials Inc | 6 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W20/0633 | 6 |
| H10P50/71 | 6 |
| H10P50/267 | 6 |
| H01L21/32136 | 5 |
| H01L21/32139 | 5 |