Hardware-optimized matrix multiplication operations for large language models
US-2026050475-A1 · Feb 19, 2026 · US
This page is not indexed by search engines while we improve data quality.
Karumannil Abid patents
Karumannil Abid is listed as an inventor on 4 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Karumannil Abid |
| Total patents | 4 |
| First publication | Sep 29, 2020 |
| Latest publication | Feb 19, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Scheduling kernels on a data processing system with one or more compute circuits
US-2025086007-A1 · Mar 13, 2025 · US
Scheduling processing of machine learning tasks on heterogeneous compute circuits
US-11561826-B1 · Jan 24, 2023 · US
Compiler and hardware abstraction layer architecture for a neural network accelerator
US-10789402-B1 · Sep 29, 2020 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Xilinx Inc | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06N3/063 | 3 |
| G06N3/08 | 2 |
| G06F9/4881 | 2 |
| G06F2209/509 | 2 |
| G06F9/5027 | 2 |