Memory Probing for Proactive Error Detection
US-2026003704-A1 · Jan 1, 2026 · US
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Gupta Rajnish patents
Gupta Rajnish is listed as an inventor on 7 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Gupta Rajnish |
| Total patents | 7 |
| First publication | Mar 11, 2021 |
| Latest publication | Jan 1, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Routing table selection based on utilization
US-11818042-B2 · Nov 14, 2023 · US
Distributing shaped sub interfaces to member ports of a port channel
US-11799795-B2 · Oct 24, 2023 · US
Routing table selection based on utilization
US-2023093144-A1 · Mar 23, 2023 · US
Routing table selection based on utilization
US-11522796-B2 · Dec 6, 2022 · US
Distributing shaped subinterfaces to member ports of a port channel
US-2022385592-A1 · Dec 1, 2022 · US
Routing table selection based on utilization
US-2021075724-A1 · Mar 11, 2021 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Arista Networks Inc | 7 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L45/748 | 4 |
| H04L45/741 | 4 |
| H04L45/66 | 4 |
| H04L45/20 | 4 |
| H04L41/0896 | 2 |