Search for an optimized read voltage
US-2026080948-A1 · Mar 19, 2026 · US
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Fitzpatrick James patents
Fitzpatrick James is listed as an inventor on 240 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Fitzpatrick James |
| Total patents | 240 |
| First publication | Apr 23, 2015 |
| Latest publication | Mar 19, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Data protection with time-varying in-situ data refresh
US-12579027-B2 · Mar 17, 2026 · US
Adaptive integrity scan rates in a memory sub-system based on block health metrics
US-2026031156-A1 · Jan 29, 2026 · US
Read soft bits through boosted modulation following reading hard bits
US-12537064-B2 · Jan 27, 2026 · US
Generating semi-soft bit data during corrective read operations in memory devices
US-2026024563-A1 · Jan 22, 2026 · US
Multi-tier cache for a memory system
US-12530303-B2 · Jan 20, 2026 · US
Program command generation with dummy data generation at a memory device
US-12517655-B2 · Jan 6, 2026 · US
Classification of error rate of data retrieved from memory cells
US-12512857-B2 · Dec 30, 2025 · US
Triethylphosphate/n-methylpyrrolidone solvent blends for making pvdf membranes
US-2025387757-A1 · Dec 25, 2025 · US
Search for an optimized read voltage
US-12488839-B2 · Dec 2, 2025 · US
Recent patents
Latest publications not already listed above.
Generating semi-soft bit data during corrective read operations in memory devices
US-12456502-B2 · Oct 28, 2025 · US
Adaptive integrity scan rates in a memory sub-system based on block health metrics
US-12451197-B2 · Oct 21, 2025 · US
Adaptive pre-read management in multi-pass programming
US-2025285682-A1 · Sep 11, 2025 · US
Memory compaction management in memory devices
US-2025284589-A1 · Sep 11, 2025 · US
Memory programming using consecutive coarse-fine programming operations of threshold voltage distributions
US-2025259681-A1 · Aug 14, 2025 · US
Selective and Dynamic Deployment of Error Correction Code Techniques in Integrated Circuit Memory Devices
US-2025259688-A1 · Aug 14, 2025 · US
Page-level and stripe-based read error handling
US-2025226045-A1 · Jul 10, 2025 · US
Conditional valley tracking during corrective reads
US-2025201316-A1 · Jun 19, 2025 · US
Adaptive pre-read management in multi-pass programming
US-12334153-B2 · Jun 17, 2025 · US
Memory compaction management in memory devices
US-12332742-B2 · Jun 17, 2025 · US
Adjustment of code rate as function of memory endurance state metric
US-12326782-B2 · Jun 10, 2025 · US
Apparatus with non-linear refresh mechanism and methods for operating the same
US-2025182810-A1 · Jun 5, 2025 · US
Memory programming using consecutive coarse-fine programming operations of threshold voltage distributions
US-12322450-B2 · Jun 3, 2025 · US
Management of programming mode transitions to accommodate a constant size of data transfer between a host system and a memory sub-system
US-2025165403-A1 · May 22, 2025 · US
Memory device programming technique for increased bits per cell
US-12307090-B2 · May 20, 2025 · US
Determine optimized read voltage via identification of distribution shape of signal and noise characteristics
US-2025131965-A1 · Apr 24, 2025 · US
Selective and dynamic deployment of error correction code techniques in integrated circuit memory devices
US-12277978-B2 · Apr 15, 2025 · US
Conditional valley tracking during corrective reads
US-12266407-B2 · Apr 1, 2025 · US
Dynamically configurable data modulation in memory systems
US-2025103214-A1 · Mar 27, 2025 · US
Adaptable data modulation in memory systems
US-2025103213-A1 · Mar 27, 2025 · US
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