Via alternate net spacing
US-12581713-B2 · Mar 17, 2026 · US
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Chen Luis patents
Chen Luis is listed as an inventor on 10 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chen Luis |
| Total patents | 10 |
| First publication | Aug 4, 2015 |
| Latest publication | Mar 17, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Phase noise reduction by controlling biasing for adjustable oscillators with cross-coupled transistors
US-12381564-B2 · Aug 5, 2025 · US
Buffer for voltage controlled oscillator (VCO) or other applications
US-12224743-B2 · Feb 11, 2025 · US
Phase noise reduction by controlling biasing for adjustable oscillators with cross-coupled transistors
US-2024297653-A1 · Sep 5, 2024 · US
Buffer for voltage controlled oscillator (vco) or other applications
US-2024243744-A1 · Jul 18, 2024 · US
Comb / fishbone metal stack
US-12009295-B2 · Jun 11, 2024 · US
Via alternate net spacing
US-2024055494-A1 · Feb 15, 2024 · US
Comb / fishbone metal stack
US-2023141245-A1 · May 11, 2023 · US
Bias circuit for temperature-compensated varactor
US-10340922-B1 · Jul 2, 2019 · US
Ring oscillator circuit and method
US-9099995-B2 · Aug 4, 2015 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Qualcomm Inc | 10 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W20/43 | 4 |
| H10D89/10 | 4 |
| H10W20/42 | 4 |
| H03L7/099 | 3 |
| H10D64/513 | 2 |