Dsp cancellation of track-and-hold induced ISI in ADC-based serial links
US-11133963-B1 · Sep 28, 2021 · US
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Casey Ronan patents
Casey Ronan is listed as an inventor on 6 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Casey Ronan |
| Total patents | 6 |
| First publication | Dec 8, 2015 |
| Latest publication | Sep 28, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Low power device for high-speed time-interleaved sampling
US-10911060-B1 · Feb 2, 2021 · US
Hybrid multiplying capacitive digital-to-analog converter (MC-DAC) based loop regulation
US-10848171-B1 · Nov 24, 2020 · US
Programmable buffering, bandwidth extension and pre-emphasis of a track-and-hold circuit using series inductance
US-10291192-B1 · May 14, 2019 · US
Method of implementing a differential integrating phase interpolator
US-9876489-B1 · Jan 23, 2018 · US
Circuits for and methods of controlling output swing in a current-mode logic circuit
US-9209809-B1 · Dec 8, 2015 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Xilinx Inc | 6 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H03M1/1245 | 2 |
| H03M1/1215 | 2 |
| H03K5/1515 | 1 |
| H03K5/065 | 1 |
| H03K5/06 | 1 |