System and method for interactive automated code generation and modification for data processing
US-12578933-B2 · Mar 17, 2026 · US
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Agarwal Vikash patents
Agarwal Vikash is listed as an inventor on 32 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Agarwal Vikash |
| Total patents | 32 |
| First publication | Jan 4, 2018 |
| Latest publication | Mar 17, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
System and method for determining data feed sources for interactive automated code generation and modification
US-12566589-B2 · Mar 3, 2026 · US
System and method for determining and maintaining data quality in data processing
US-2025284674-A1 · Sep 11, 2025 · US
System and method for determining and maintaining data quality in data processing
US-12411822-B2 · Sep 9, 2025 · US
Circuitry and methods for power efficient generation of length markers for a variable length instruction set
US-12353881-B2 · Jul 8, 2025 · US
System, apparatus and method for scheduling instructions based on critical dependence
US-2025199851-A1 · Jun 19, 2025 · US
Network node-to-node connectivity verification including data path processing of packets within a packet switching device
US-12273254-B2 · Apr 8, 2025 · US
System and method for determining and maintaining data quality in data processing
US-2025086148-A1 · Mar 13, 2025 · US
System and method for interactive automated code generation and modification for data processing
US-2025085932-A1 · Mar 13, 2025 · US
System and method for interactive automated modification of transformed data sets
US-2025085839-A1 · Mar 13, 2025 · US
Recent patents
Latest publications not already listed above.
System and method for determining data feed sources for interactive automated code generation and modification
US-2025085930-A1 · Mar 13, 2025 · US
Methods, systems, and apparatuses for scalable port-binding for asymmetric execution ports and allocation widths of a processor
US-12190157-B2 · Jan 7, 2025 · US
Methods, systems, and apparatuses to optimize partial flag updating instructions via dynamic two-pass execution in a processor
US-12039329-B2 · Jul 16, 2024 · US
Platform for generating published reports using report and worksheet building with position mapping identification
US-11983491-B2 · May 14, 2024 · US
System and method for data analysis and processing using identification tagging of information on a graphical user interface
US-11983391-B2 · May 14, 2024 · US
System and method for data analysis and processing using graphical user interface position mapping identification
US-2024069935-A1 · Feb 29, 2024 · US
Platform for generating published reports using report and worksheet building with position mapping identification
US-2024070385-A1 · Feb 29, 2024 · US
System and method for data analysis and processing using identification tagging of information on a graphical user interface
US-2024069698-A1 · Feb 29, 2024 · US
Platform for generating published reports using report and worksheet building with position mapping identification
US-2024070384-A1 · Feb 29, 2024 · US
Methods, systems, and apparatuses for out-of-order access to a shared microcode sequencer by a clustered decode pipeline
US-11907712-B2 · Feb 20, 2024 · US
Platform for generating published reports using report and worksheet building with position mapping identification
US-11900054-B1 · Feb 13, 2024 · US
Network node-to-node connectivity verification including data path processing of packets within a packet switching device
US-11824753-B2 · Nov 21, 2023 · US
Network node-to-node connectivity verification including data path processing of packets within a packet switching device
US-2023327972-A1 · Oct 12, 2023 · US
Platform for generating published reports with position mapping identification and template carryover reporting
US-11663399-B1 · May 30, 2023 · US
Network Node-to-Node Connectivity Verification including Data Path Processing of Packets within a Packet Switching Device
US-2023077101-A1 · Mar 9, 2023 · US
Methods, systems, and apparatuses to optimize partial flag updating instructions via dynamic two-pass execution in a processor
US-2022206792-A1 · Jun 30, 2022 · US
Methods, systems, and apparatuses for a scalable reservation station implementing a single unified speculation state propagation and execution wakeup matrix circuit in a processor
US-2022206793-A1 · Jun 30, 2022 · US
Circuitry and methods for power efficient generation of length markers for a variable length instruction set
US-2022100516-A1 · Mar 31, 2022 · US
Methods, systems, and apparatuses for scalable port-binding for asymmetric execution ports and allocation widths of a processor
US-2022100569-A1 · Mar 31, 2022 · US
Methods, systems, and apparatuses for out-of-order access to a shared microcode sequencer by a clustered decode pipeline
US-2022100500-A1 · Mar 31, 2022 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Bank Of America | 16 |
| Intel Corp | 12 |
| Cisco Tech Inc | 4 |
| Cisco Tech Inc A California Corporation | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F40/18 | 8 |
| G06F9/30145 | 7 |
| G06F9/3836 | 7 |
| G06F9/223 | 5 |
| G06F40/103 | 5 |